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On Sat, 8 Jun 2013, Richard Sandiford wrote:

> Yeah, that's quite the patch.  Thanks for doing this.  The opcode table
> changes were pretty much impossible to review manually, so I opted for
> review by script instead.  This threw up the changes below.  Some of them
> are just minor formatting tweaks: the IOCT|IOCTP|IOCT2 lines are removing
> an excess tab that was carried over from the original, the SMT lines are
> using a tab rather than a space, and the IL2F|IL3A lines are to avoid
> whitespace changes on lines that don't need to be touched.  I think the
> rest are real fixes though.  Still, if you wrote the changes by hand,
> the number of differences is impressively small :-)

 Great work indeed -- thanks, Catherine!

> I've applied the patch with these changes and with a minor tweak to the
> mips-dis.c formatting of the mips32r2 and mips64r2 entries.

 A small nit below:

> Index: opcodes/micromips-opc.c
> ===================================================================
> --- opcodes/micromips-opc.c	2013-06-08 10:18:33.894842596 +0100
> +++ opcodes/micromips-opc.c	2013-06-08 10:18:44.227957964 +0100
> @@ -115,7 +115,7 @@ const struct mips_opcode micromips_opcod
>  /* These instructions appear first so that the disassembler will find
>     them first.  The assemblers uses a hash table based on the
>     instruction name anyhow.  */
> -/* name,    args,	match,      mask,	pinfo,			pinfo2,		membership,	[exclusions] */
> +/* name,    args,	match,      mask,	pinfo,			pinfo2,		membership,	[ase],	[exclusions] */

 I think this should be:

/* name,    args,	match,      mask,	pinfo,			pinfo2,		membership[[,	ase],	exclusions] */

or suchlike as the use of "exclusions" requires "ase" to have been set 
too (possibly to 0).  Likewise in opcodes/mips-opc.c.


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