IP2K Architecture Documentation
DISCLAIMER: This documentation is derived from the cgen cpu description
of this architecture, and does not represent official documentation
of the chip maker.
In cgen-parlance, an architecture consists of machines and models.
A `machine' is the specification of a variant of the architecture,
and a `model' is the implementation of that specification.
Typically there is a one-to-one correspondance between machine and model.
The distinction allows for separation of what application programs see
(the machine), and how to tune for the chip (what the compiler sees).
A "cpu family" is a cgen concoction to help organize the generated code.
Chip variants that are quite dissimilar can be treated separately by the
generated code even though they're both members of the same architecture.
IP2K Architecture
This section describes various things about the cgen description of
the IP2K architecture. Familiarity with cgen cpu descriptions
is assumed.
Bit number orientation (arch.lsb0?): lsb = 0
ISA description
-
ip2k - Ubicom IP2000 ISA
- default-insn-word-bitsize: 16
- default-insn-bitsize: 16
- base-insn-bitsize: 16
- decode-assist:
- decode-splits:
CPU Families
-
ip2kbf - Ubicom IP2000 Family
Machines:
-
ip2022 - Ubicom IP2022
Models:
-
ip2022ext - Ubicom IP2022 extended
Models:
Machine variants
ip2022 - Ubicom IP2022
-
bfd-name: ip2022
-
isas: ip2k
ip2022ext - Ubicom IP2022 extended
-
bfd-name: ip2022ext
-
isas: ip2k
Model variants
ip2k - VPE 2xxx
Registers
h-cbit - carry bit
-
machines: base
-
bitsize: 1
h-dcbit - digit-carry bit
-
machines: base
-
bitsize: 1
h-pabits - page bits
-
machines: base
-
bitsize: 8
h-pc - program counter
-
machines: base
-
bitsize: 16
h-registers - all addressable registers
-
machines: base
-
bitsize: 8
-
array: [512]
h-spr - special-purpose registers
-
machines: base
-
bitsize: 8
-
array: [128]
h-stack - hardware stack
-
machines: base
-
bitsize: 16
-
array: [16]
h-zbit - zero bit
-
machines: base
-
bitsize: 1
Assembler supplemental
This documentation was machine generated from the cgen cpu description
files for this architecture.
http://sources.redhat.com/cgen/