IP2K Instruction Documentation

Instructions

Instructions for each machine:

ip2022 - Ubicom IP2022

ALU - ALU
BR - Branch
alphabetically

ip2022ext - Ubicom IP2022 extended

ALU - ALU
BR - Branch
alphabetically

Individual instructions descriptions

addcfr_w - Add w/carry fr,W

machines: base

syntax: addc $fr,W

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x17 0x1 fr

semantics:

(sequence
  ((QI result)
   (BI newcbit)
   (QI isLreg)
   (HI 16bval))
  (set newcbit (add-cflag (reg h-spr 10) fr cbit))
  (set dcbit
       (add-cflag
         (sll QI (reg h-spr 10) 4)
         (sll QI fr 4)
         cbit))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval (addc HI 16bval (reg h-spr 10) cbit))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set result (reg h-spr f-reg)))
      (set result (addc (reg h-spr 10) fr cbit)))
  (set zbit (eq result 0))
  (set cbit newcbit)
  (set fr result))

addcw_fr - Add w/carry W,fr

machines: base

syntax: addc W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x17 0x0 fr

semantics:

(sequence
  ((QI result) (BI newcbit))
  (set newcbit (add-cflag (reg h-spr 10) fr cbit))
  (set dcbit
       (add-cflag
         (sll QI (reg h-spr 10) 4)
         (sll QI fr 4)
         cbit))
  (set result (addc (reg h-spr 10) fr cbit))
  (set zbit (eq result 0))
  (set cbit newcbit)
  (set (reg h-spr 10) result))

addfr_w - Add fr,W

machines: base

syntax: add $fr,W

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x7 0x1 fr

semantics:

(sequence
  ((QI result) (QI isLreg) (HI 16bval))
  (set cbit (add-cflag (reg h-spr 10) fr 0))
  (set dcbit
       (add-cflag
         (sll QI (reg h-spr 10) 4)
         (sll QI fr 4)
         0))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval
             (add HI (and (reg h-spr 10) 255) 16bval))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set result (reg h-spr f-reg)))
      (set result (addc (reg h-spr 10) fr 0)))
  (set zbit (eq result 0))
  (set fr result))

addw_fr - Add W,fr

machines: base

syntax: add W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x7 0x0 fr

semantics:

(sequence
  ((QI result))
  (set cbit (add-cflag (reg h-spr 10) fr 0))
  (set dcbit
       (add-cflag
         (sll QI (reg h-spr 10) 4)
         (sll QI fr 4)
         0))
  (set result (addc (reg h-spr 10) fr 0))
  (set zbit (eq result 0))
  (set (reg h-spr 10) result))

addw_l - ADD W,literal

machines: base

syntax: add W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0xb lit8

semantics:

(sequence
  ()
  (set cbit (add-cflag (reg h-spr 10) lit8 0))
  (set dcbit
       (add-cflag
         (sll QI (reg h-spr 10) 4)
         (sll QI lit8 4)
         0))
  (set (reg h-spr 10) (add (reg h-spr 10) lit8))
  (set zbit (eq (reg h-spr 10) 0)))

andfr_w - AND fr,W

machines: base

syntax: and $fr,W

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x5 0x1 fr

semantics:

(sequence
  ()
  (set fr (and (reg h-spr 10) fr))
  (set zbit (eq fr 0)))

andw_fr - AND W,fr

machines: base

syntax: and W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x5 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (and fr (reg h-spr 10)))
  (set zbit (eq (reg h-spr 10) 0)))

andw_l - AND W,literal

machines: base

syntax: and W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0xe lit8

semantics:

(sequence
  ()
  (set (reg h-spr 10) (and (reg h-spr 10) lit8))
  (set zbit (eq (reg h-spr 10) 0)))

break - Breakpoint

machines: base

syntax: break

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x1

semantics:
```
(c-call "do_break" pc)
```

breakx - Breakpoint with extended skip

machines: base

syntax: breakx

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x5

semantics:
```
(c-call "do_break" pc)
```

call - Call

machines: base

syntax: call $addr16cjp

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op3 f-addr16cjp

0x6 addr16cjp

semantics:

(sequence
  ()
  (c-call "push_pc_stack" pc)
  (set pc (or (sll pabits 13) addr16cjp)))

clr_fr - Clear fr

machines: base

syntax: clr $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x1 0x1 fr

semantics:

(sequence () (set fr 0) (set zbit (eq fr 0)))

clrb - Clear bit

machines: base

syntax: clrb $fr,$bitno

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-bitno f-reg

0x8 bitno fr

semantics:
```
(set fr (and fr (inv (sll 1 bitno))))
```

cmpw_fr - CMP W,fr

machines: base

syntax: cmp W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x1 0x0 fr

semantics:

(sequence
  ()
  (set cbit (not (sub-cflag fr (reg h-spr 10) 0)))
  (set dcbit
       (not (sub-cflag
              (sll QI fr 4)
              (sll QI (reg h-spr 10) 4)
              0)))
  (set zbit (eq (sub (reg h-spr 10) fr) 0)))

cmpw_l - CMP W,literal

machines: base

syntax: cmp W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x9 lit8

semantics:

(sequence
  ()
  (set cbit
       (not (sub-cflag lit8 (reg h-spr 10) 0)))
  (set dcbit
       (not (sub-cflag
              (sll QI lit8 4)
              (sll QI (reg h-spr 10) 4)
              0)))
  (set zbit (eq (sub (reg h-spr 10) lit8) 0)))

csew_fr - Skip if equal W,fr

machines: base

syntax: cse W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x10 0x1 fr

semantics:
```
(if (eq (reg h-spr 10) fr) (skip 1))
```

csew_l - CSE W,literal

machines: base

syntax: cse W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x7 lit8

semantics:
```
(if (eq (reg h-spr 10) lit8) (skip 1))
```

csnew_fr - Skip if not-equal W,fr

machines: base

syntax: csne W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x10 0x0 fr

semantics:

(if (not (eq (reg h-spr 10) fr)) (skip 1))

csnew_l - CSNE W,literal

machines: base

syntax: csne W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x6 lit8

semantics:

(if (not (eq (reg h-spr 10) lit8)) (skip 1))

cwdt - Clear watchdog timer

machines: base

syntax: cwdt

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x4

semantics:
```
(c-call "do_clear_wdt")
```

dec_fr - Decrement fr

machines: base

syntax: dec $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x3 0x1 fr

semantics:

(sequence
  ((QI isLreg) (HI 16bval))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval (sub HI 16bval 1))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set fr (reg h-spr f-reg)))
      (set fr (sub fr 1)))
  (set zbit (eq fr 0)))

decsnz_fr - Skip if fr-- not zero

machines: base

syntax: decsnz $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x13 0x1 fr

semantics:

(sequence
  ((QI isLreg) (HI 16bval))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval (sub HI 16bval 1))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set fr (reg h-spr f-reg)))
      (set fr (sub fr 1)))
  (if (not (eq fr 0)) (skip 1)))

decsnzw_fr - Skip if W=fr-1 not zero

machines: base

syntax: decsnz W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x13 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (sub fr 1))
  (if (not (eq (reg h-spr 10) 0)) (skip 1)))

decsz_fr - Skip if fr-- zero

machines: base

syntax: decsz $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xb 0x1 fr

semantics:

(sequence
  ((QI isLreg) (HI 16bval))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval (sub HI 16bval 1))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set fr (reg h-spr f-reg)))
      (set fr (sub fr 1)))
  (if (eq fr 0) (skip 1)))

decszw_fr - Skip if W=fr-1 zero

machines: base

syntax: decsz W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xb 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (sub fr 1))
  (if (eq (reg h-spr 10) 0) (skip 1)))

decw_fr - Decrement fr into w

machines: base

syntax: dec W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x3 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (sub fr 1))
  (set zbit (eq (reg h-spr 10) 0)))

ferase - Flash erase

machines: base

syntax: ferase

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x3

semantics:
```
(c-call "do_flash_erase")
```

fread - Flash read

machines: base

syntax: fread

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x1b

semantics:
```
(c-call "do_flash_read")
```

fwrite - Flash write

machines: base

syntax: fwrite

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x1a

semantics:
```
(c-call "do_flash_write")
```

inc_fr - Increment fr

machines: base

syntax: inc $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xa 0x1 fr

semantics:

(sequence
  ((QI isLreg) (HI 16bval))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval (add HI 16bval 1))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set fr (reg h-spr f-reg)))
      (set fr (add fr 1)))
  (set zbit (eq fr 0)))

incsnz_fr - Skip if fr++ not zero

machines: base

syntax: incsnz $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x16 0x1 fr

semantics:

(sequence
  ((QI isLreg) (HI 16bval))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval (add HI 16bval 1))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set fr (reg h-spr f-reg)))
      (set fr (add fr 1)))
  (if (not (eq fr 0)) (skip 1)))

incsnzw_fr - Skip if W=fr+1 not zero

machines: base

syntax: incsnz W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x16 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (add fr 1))
  (if (not (eq (reg h-spr 10) 0)) (skip 1)))

incsz_fr - Skip if fr++ zero

machines: base

syntax: incsz $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xf 0x1 fr

semantics:

(sequence
  ((QI isLreg) (HI 16bval))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval (add HI 16bval 1))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set fr (reg h-spr f-reg)))
      (set fr (add fr 1)))
  (if (eq fr 0) (skip 1)))

incszw_fr - Skip if W=fr+1 zero

machines: base

syntax: incsz W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xf 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (add fr 1))
  (if (eq (reg h-spr 10) 0) (skip 1)))

incw_fr - Increment fr into w

machines: base

syntax: inc W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xa 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (add fr 1))
  (set zbit (eq (reg h-spr 10) 0)))

int - Software interrupt

machines: base

syntax: int

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x6

semantics:
```
(nop)
```

iread - Insn memory read

machines: base

syntax: iread

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x19

semantics:
```
(c-call "do_insn_read")
```

ireadi - Insn memory read with increment

machines: base

syntax: ireadi

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x1d

semantics:
```
(c-call "do_insn_read")
```

iwrite - Insn memory write

machines: base

syntax: iwrite

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x18

semantics:
```
(c-call "do_insn_write")
```

iwritei - Insn memory write with increment

machines: base

syntax: iwritei

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x1c

semantics:
```
(c-call "do_insn_write")
```

jmp - Jump

machines: base

syntax: jmp $addr16cjp

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op3 f-addr16cjp

0x7 addr16cjp

semantics:

(set pc (or (sll pabits 13) addr16cjp))

loadh_a - LoadH addr16h

machines: base

syntax: loadh $addr16h

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x0 addr16h

semantics:

(set (reg h-spr 12) (and addr16l 65280))

loadh_l - LoadH literal

machines: base

syntax: loadh #$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x0 lit8

semantics:
```
(set (reg h-spr 12) (and lit8 255))
```

loadl_a - LoadL addr16l

machines: base

syntax: loadl $addr16l

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x1 addr16l

semantics:
```
(set (reg h-spr 13) (and addr16l 255))
```

loadl_l - LoadL literal

machines: base

syntax: loadl #$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x1 lit8

semantics:
```
(set (reg h-spr 13) (and lit8 255))
```

movfr_w - Move/test w into fr

machines: base

syntax: mov $fr,W

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x0 0x1 fr

semantics:
```
(set fr (reg h-spr 10))
```

movw_fr - Move/test fr into w

machines: base

syntax: mov W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x8 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) fr)
  (set zbit (eq (reg h-spr 10) 0)))

movw_l - MOV W,literal

machines: base

syntax: mov W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0xc lit8

semantics:
```
(set (reg h-spr 10) lit8)
```

mulsw_fr - Multiply W,fr (signed)

machines: base

syntax: muls W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x15 0x0 fr

semantics:

(sequence
  ((SI tmp))
  (set tmp
       (mul (ext SI (reg h-spr 10)) (ext SI fr)))
  (set (reg h-spr 10) (and tmp 255))
  (set (reg h-spr 15) (srl tmp 8)))

mulsw_l - Multiply W,literal (signed)

machines: base

syntax: muls W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x3 lit8

semantics:

(sequence
  ((SI tmp))
  (set tmp
       (mul (ext SI (reg h-spr 10))
            (ext SI (and UQI 255 lit8))))
  (set (reg h-spr 10) (and tmp 255))
  (set (reg h-spr 15) (srl tmp 8)))

muluw_fr - Multiply W,fr (unsigned)

machines: base

syntax: mulu W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x14 0x0 fr

semantics:

(sequence
  ((USI tmp))
  (set tmp
       (and 65535
            (mul (zext USI (reg h-spr 10)) (zext USI fr))))
  (set (reg h-spr 10) (and tmp 255))
  (set (reg h-spr 15) (srl tmp 8)))

muluw_l - Multiply W,literal (unsigned)

machines: base

syntax: mulu W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x2 lit8

semantics:

(sequence
  ((USI tmp))
  (set tmp
       (and 65535
            (mul (zext USI (reg h-spr 10)) (zext USI lit8))))
  (set (reg h-spr 10) (and tmp 255))
  (set (reg h-spr 15) (srl tmp 8)))

nop - No operation

machines: base

syntax: nop

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x0

semantics:
```
(nop)
```

not_fr - Invert fr

machines: base

syntax: not $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x9 0x1 fr

semantics:

(sequence
  ()
  (set fr (inv fr))
  (set zbit (eq fr 0)))

notw_fr - Invert fr into w

machines: base

syntax: not W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x9 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (inv fr))
  (set zbit (eq (reg h-spr 10) 0)))

orfr_w - OR fr,W

machines: base

syntax: or $fr,W

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x4 0x1 fr

semantics:

(sequence
  ()
  (set fr (or (reg h-spr 10) fr))
  (set zbit (eq fr 0)))

orw_fr - OR W,fr

machines: base

syntax: or W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x4 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (or fr (reg h-spr 10)))
  (set zbit (eq (reg h-spr 10) 0)))

orw_l - OR W,literal

machines: base

syntax: or W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0xd lit8

semantics:

(sequence
  ()
  (set (reg h-spr 10) (or (reg h-spr 10) lit8))
  (set zbit (eq (reg h-spr 10) 0)))

page - Set insn page

machines: base

syntax: page $addr16p

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-7low f-page3

0x0 0x2 addr16p

semantics:
```
(set pabits addr16p)
```

pop_fr - Pop fr

machines: base

syntax: pop $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x11 0x1 fr

semantics:

(sequence
  ()
  (set fr (c-call QI "pop"))
  (c-call VOID "adjuststackptr" 1))

push_fr - Push fr

machines: base

syntax: push $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x11 0x0 fr

semantics:

(sequence
  ()
  (c-call "push" fr)
  (c-call VOID "adjuststackptr" -1))

push_l - Push #lit8

machines: base

syntax: push #$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x4 lit8

semantics:

(sequence
  ()
  (c-call "push" lit8)
  (c-call VOID "adjuststackptr" -1))

ret - Return

machines: base

syntax: ret

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x7

semantics:

(sequence
  ((USI new_pc))
  (set new_pc (c-call UHI "pop_pc_stack"))
  (set pabits (srl new_pc 13))
  (set pc new_pc))

reti - Return from interrupt

machines: base

syntax: reti #$reti3

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-7low f-reti3

0x0 0x1 reti3

semantics:
```
(c-call "do_reti" reti3)
```

retnp - Return, no page

machines: base

syntax: retnp

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0x2

semantics:

(sequence
  ((USI new_pc))
  (set new_pc (c-call UHI "pop_pc_stack"))
  (set pc new_pc))

retw_l - RETW literal

machines: base

syntax: retw #$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0x8 lit8

semantics:

(sequence
  ((USI new_pc))
  (set (reg h-spr 10) lit8)
  (set new_pc (c-call UHI "pop_pc_stack"))
  (set pabits (srl new_pc 13))
  (set pc new_pc))

rl_fr - Rotate fr left with carry

machines: base

syntax: rl $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xd 0x1 fr

semantics:

(sequence
  ((QI newfr) (BI newc))
  (set newc (and fr 128))
  (set newfr (or (sll fr 1) (if QI cbit 1 0)))
  (set cbit (if QI newc 1 0))
  (set fr newfr))

rlw_fr - Rotate fr left with carry into W

machines: base

syntax: rl W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xd 0x0 fr

semantics:

(sequence
  ((QI newfr) (BI newc))
  (set newc (and fr 128))
  (set newfr (or (sll fr 1) (if QI cbit 1 0)))
  (set cbit (if QI newc 1 0))
  (set (reg h-spr 10) newfr))

rr_fr - Rotate fr right with carry

machines: base

syntax: rr $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xc 0x1 fr

semantics:

(sequence
  ((QI newfr) (BI newc))
  (set newc (and fr 1))
  (set newfr (or (srl fr 1) (if QI cbit 128 0)))
  (set cbit (if QI newc 1 0))
  (set fr newfr))

rrw_fr - Rotate fr right with carry into W

machines: base

syntax: rr W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xc 0x0 fr

semantics:

(sequence
  ((QI newfr) (BI newc))
  (set newc (and fr 1))
  (set newfr (or (srl fr 1) (if QI cbit 128 0)))
  (set cbit (if QI newc 1 0))
  (set (reg h-spr 10) newfr))

sb - Skip if bit set

machines: base

syntax: sb $fr,$bitno

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-bitno f-reg

0xb bitno fr

semantics:
```
(if (and fr (sll 1 bitno)) (skip 1))
```

setb - Set bit

machines: base

syntax: setb $fr,$bitno

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-bitno f-reg

0x9 bitno fr

semantics:
```
(set fr (or fr (sll 1 bitno)))
```

snb - Skip if bit clear

machines: base

syntax: snb $fr,$bitno

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-bitno f-reg

0xa bitno fr

semantics:

(if (not (and fr (sll 1 bitno))) (skip 1))

speed - Set speed

machines: base

syntax: speed #$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op8 f-imm8

0x1 lit8

semantics:
```
(set (reg h-registers 14) lit8)
```

subcfr_w - Subtract w/carry fr,W

machines: base

syntax: subc $fr,W

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x12 0x1 fr

semantics:

(sequence
  ((QI result)
   (BI newcbit)
   (QI isLreg)
   (HI 16bval))
  (set newcbit
       (not (sub-cflag fr (reg h-spr 10) (not cbit))))
  (set dcbit
       (not (sub-cflag
              (sll QI fr 4)
              (sll QI (reg h-spr 10) 4)
              (not cbit))))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval
             (subc HI 16bval (reg h-spr 10) (not cbit)))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set result (reg h-spr f-reg)))
      (set result (subc fr (reg h-spr 10) (not cbit))))
  (set zbit (eq result 0))
  (set cbit newcbit)
  (set fr result))

subcw_fr - Subract w/carry W,fr

machines: base

syntax: subc W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x12 0x0 fr

semantics:

(sequence
  ((QI result) (BI newcbit))
  (set newcbit
       (not (sub-cflag fr (reg h-spr 10) (not cbit))))
  (set dcbit
       (not (sub-cflag
              (sll QI fr 4)
              (sll QI (reg h-spr 10) 4)
              (not cbit))))
  (set result (subc fr (reg h-spr 10) (not cbit)))
  (set zbit (eq result 0))
  (set cbit newcbit)
  (set (reg h-spr 10) result))

subfr_w - Sub fr,W

machines: base

syntax: sub $fr,W

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x2 0x1 fr

semantics:

(sequence
  ((QI result) (QI isLreg) (HI 16bval))
  (set cbit (not (sub-cflag fr (reg h-spr 10) 0)))
  (set dcbit
       (not (sub-cflag
              (sll QI fr 4)
              (sll QI (reg h-spr 10) 4)
              0)))
  (sequence
    ()
    (set isLreg 0)
    (if (or (or (eq f-reg 5) (eq f-reg 7))
            (or (eq f-reg 9)
                (or (eq f-reg 13) (eq f-reg 17))))
        (set isLreg 1)))
  (if (eq isLreg 1)
      (sequence
        ()
        (set 16bval (reg h-spr (sub f-reg 1)))
        (set 16bval (sll 16bval 8))
        (set 16bval
             (or 16bval (and (reg h-spr f-reg) 255)))
        (set 16bval
             (sub HI 16bval (and (reg h-spr 10) 255)))
        (set (reg h-spr f-reg) (and 16bval 255))
        (set (reg h-spr (sub f-reg 1))
             (and (srl 16bval 8) 255))
        (set result (reg h-spr f-reg)))
      (set result (subc fr (reg h-spr 10) 0)))
  (set zbit (eq result 0))
  (set fr result))

subw_fr - Sub W,fr

machines: base

syntax: sub W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x2 0x0 fr

semantics:

(sequence
  ((QI result))
  (set cbit (not (sub-cflag fr (reg h-spr 10) 0)))
  (set dcbit
       (not (sub-cflag
              (sll QI fr 4)
              (sll QI (reg h-spr 10) 4)
              0)))
  (set result (subc fr (reg h-spr 10) 0))
  (set zbit (eq result 0))
  (set (reg h-spr 10) result))

subw_l - SUB W,literal

machines: base

syntax: sub W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0xa lit8

semantics:

(sequence
  ()
  (set cbit
       (not (sub-cflag lit8 (reg h-spr 10) 0)))
  (set dcbit
       (not (sub-cflag
              (sll QI lit8 4)
              (sll QI (reg h-spr 10) 4)
              0)))
  (set zbit (eq (sub (reg h-spr 10) lit8) 0))
  (set (reg h-spr 10) (sub lit8 (reg h-spr 10))))

swap_fr - Swap fr nibbles

machines: base

syntax: swap $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xe 0x1 fr

semantics:

(set fr
     (or (and (sll fr 4) 240) (and (srl fr 4) 15)))

swapw_fr - Swap fr nibbles into W

machines: base

syntax: swap W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0xe 0x0 fr

semantics:

(set (reg h-spr 10)
     (or (and (sll fr 4) 240) (and (srl fr 4) 15)))

system - System call

machines: base

syntax: system

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-op6-10low

0x0 0xff

semantics:
```
(c-call "do_system")
```

test_fr - Test fr

machines: base

syntax: test $fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x8 0x1 fr

semantics:
```
(sequence () (set zbit (eq fr 0)))
```

xorfr_w - XOR fr,W

machines: base

syntax: xor $fr,W

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x6 0x1 fr

semantics:

(sequence
  ()
  (set fr (xor (reg h-spr 10) fr))
  (set zbit (eq fr 0)))

xorw_fr - XOR W,fr

machines: base

syntax: xor W,$fr

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op6 f-dir f-reg

0x6 0x0 fr

semantics:

(sequence
  ()
  (set (reg h-spr 10) (xor fr (reg h-spr 10)))
  (set zbit (eq (reg h-spr 10) 0)))

xorw_l - XOR W,literal

machines: base

syntax: xor W,#$lit8

format:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

f-op4 f-op4mid f-imm8

0x7 0xf lit8

semantics:

(sequence
  ()
  (set (reg h-spr 10) (xor (reg h-spr 10) lit8))
  (set zbit (eq (reg h-spr 10) 0)))

Macro Instructions

Macro instructions for each machine:

ip2022 - Ubicom IP2022
ip2022ext - Ubicom IP2022 extended

ip2022ext - Ubicom IP2022 extended

sc - Skip on carry
snc - Skip on no carry
sz - Skip on zero
snz - Skip on no zero
skip - Skip always
skipb - Skip always

Individual macro-instructions descriptions

sc - Skip on carry

syntax: sc

transformation:
```
((emit sb (bitno 0) (fr 11)))
```

skip - Skip always

syntax: skip

transformation:
```
((emit snb (bitno 0) (fr 9)))
```

skipb - Skip always

syntax: skip

transformation:
```
((emit sb (bitno 0) (fr 9)))
```

snc - Skip on no carry

syntax: snc

transformation:
```
((emit snb (bitno 0) (fr 11)))
```

snz - Skip on no zero

syntax: snz

transformation:
```
((emit snb (bitno 2) (fr 11)))
```

sz - Skip on zero

syntax: sz

transformation:
```
((emit sb (bitno 2) (fr 11)))
```

This documentation was machine generated from the cgen cpu description files for this architecture.
http://sources.redhat.com/cgen/

15 14 13 12	11 10 9 8	7 6 5 4 3 2 1 0
f-op4	f-op4mid	f-imm8
0x7	0xb	lit8

15 14 13	12 11 10 9 8 7 6 5 4 3 2 1 0
f-op3	f-addr16cjp
0x6	addr16cjp

15 14 13 12	11 10 9	8 7 6 5 4 3 2 1 0
f-op4	f-bitno	f-reg
0x8	bitno	fr

15 14 13 12 11 10	9 8 7 6 5 4 3	2 1 0
f-op6	f-op6-7low	f-page3
0x0	0x2	addr16p

15 14 13 12 11 10	9	8 7 6 5 4 3 2 1 0
f-op6	f-dir	f-reg
0x17	0x1	fr

15 14 13 12 11 10	9	8 7 6 5 4 3 2 1 0
f-op6	f-dir	f-reg
0x5	0x1	fr

15 14 13 12 11 10	9 8 7 6 5 4 3 2 1 0
f-op6	f-op6-10low
0x0	0x1

15 14 13 12 11 10	9 8 7 6 5 4 3 2 1 0
f-op6	f-op6-10low
0x0	0x5

Instructions

ip2022 ALU - ALU

ip2022 BR - Branch

ip2022 ip2022 - Ubicom IP2022

ip2022ext ALU - ALU

ip2022ext BR - Branch

ip2022ext ip2022ext - Ubicom IP2022 extended

Individual instructions descriptions

addcfr_w - Add w/carry fr,W

addcw_fr - Add w/carry W,fr

addfr_w - Add fr,W

addw_fr - Add W,fr

addw_l - ADD W,literal

andfr_w - AND fr,W

andw_fr - AND W,fr

andw_l - AND W,literal

break - Breakpoint

breakx - Breakpoint with extended skip

call - Call

clr_fr - Clear fr

clrb - Clear bit

cmpw_fr - CMP W,fr

cmpw_l - CMP W,literal

csew_fr - Skip if equal W,fr

csew_l - CSE W,literal

csnew_fr - Skip if not-equal W,fr

csnew_l - CSNE W,literal

cwdt - Clear watchdog timer

dec_fr - Decrement fr

decsnz_fr - Skip if fr-- not zero

decsnzw_fr - Skip if W=fr-1 not zero

decsz_fr - Skip if fr-- zero

decszw_fr - Skip if W=fr-1 zero

decw_fr - Decrement fr into w

ferase - Flash erase

fread - Flash read

fwrite - Flash write

inc_fr - Increment fr

incsnz_fr - Skip if fr++ not zero

incsnzw_fr - Skip if W=fr+1 not zero

incsz_fr - Skip if fr++ zero

incszw_fr - Skip if W=fr+1 zero

incw_fr - Increment fr into w

int - Software interrupt

iread - Insn memory read

ireadi - Insn memory read with increment

iwrite - Insn memory write

iwritei - Insn memory write with increment

jmp - Jump

loadh_a - LoadH addr16h

loadh_l - LoadH literal

loadl_a - LoadL addr16l

loadl_l - LoadL literal

movfr_w - Move/test w into fr

movw_fr - Move/test fr into w

movw_l - MOV W,literal

mulsw_fr - Multiply W,fr (signed)

mulsw_l - Multiply W,literal (signed)

muluw_fr - Multiply W,fr (unsigned)

muluw_l - Multiply W,literal (unsigned)

nop - No operation

not_fr - Invert fr

notw_fr - Invert fr into w

orfr_w - OR fr,W

orw_fr - OR W,fr

orw_l - OR W,literal

page - Set insn page

pop_fr - Pop fr

push_fr - Push fr

push_l - Push #lit8

ret - Return

reti - Return from interrupt

retnp - Return, no page

retw_l - RETW literal

rl_fr - Rotate fr left with carry

rlw_fr - Rotate fr left with carry into W

rr_fr - Rotate fr right with carry

rrw_fr - Rotate fr right with carry into W

sb - Skip if bit set

setb - Set bit