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Re: [PATCH -tip v5 07/10] kprobes/x86: Support kprobes jump optimization on x86
- From: Masami Hiramatsu <mhiramat at redhat dot com>
- To: "H. Peter Anvin" <hpa at zytor dot com>
- Cc: Frederic Weisbecker <fweisbec at gmail dot com>, Ingo Molnar <mingo at elte dot hu>, Ananth N Mavinakayanahalli <ananth at in dot ibm dot com>, lkml <linux-kernel at vger dot kernel dot org>, systemtap <systemtap at sources dot redhat dot com>, DLE <dle-develop at lists dot sourceforge dot net>, Jim Keniston <jkenisto at us dot ibm dot com>, Srikar Dronamraju <srikar at linux dot vnet dot ibm dot com>, Christoph Hellwig <hch at infradead dot org>, Steven Rostedt <rostedt at goodmis dot org>, Anders Kaseorg <andersk at ksplice dot com>, Tim Abbott <tabbott at ksplice dot com>, Andi Kleen <andi at firstfloor dot org>, Jason Baron <jbaron at redhat dot com>, Mathieu Desnoyers <mathieu dot desnoyers at polymtl dot ca>
- Date: Tue, 24 Nov 2009 12:00:49 -0500
- Subject: Re: [PATCH -tip v5 07/10] kprobes/x86: Support kprobes jump optimization on x86
- References: <20091123232115.22071.71558.stgit@dhcp-100-2-132.bos.redhat.com> <20091123232211.22071.58974.stgit@dhcp-100-2-132.bos.redhat.com> <4B0C0B50.6000907@zytor.com>
Hi Peter,
H. Peter Anvin wrote:
On 11/23/2009 03:22 PM, Masami Hiramatsu wrote:
This uses stop_machine() for corss modifying code from int3 to jump.
It doesn't allow us to modify code on NMI/SMI path. However, since
kprobes itself doesn't support NMI/SMI code probing, it's not a
problem.
I'm a bit confused by the above statement... does that mean you're
poking int3 and *then* do stop_machine()?
Yes, as I said in http://lkml.org/lkml/2009/11/24/310,
there are two separated issues.
----
We have to separate below issues:
- int3-based multi-bytes code replacement
- multi-instruction replacement with int3-detour code
The former is implemented on patch 9/10 and 10/10. As you can see,
these patches are RFC status, because I'd like to wait for official
reply of safeness from processor architects.
And it may be able to use a dummy IPI for 2nd IPI because it
just for waiting int3 interrupts. But again, it is just estimated that
replacing with/recovering from int3 is automatically synchronized...
However, at least stop_machine() method is officially described
at "7.1.3 Handling Self- and Cross-Modifying Code" on the intel's
software developer's manual 3A . So currently we can use it.
For the latter issue, as I explained on previous reply, we need
to wait all running interrupts including hardware interrupts.
Thus I used synchronize_sched().
----
So that the previous "x86 generic jump patching" patch is
basically for single-instruction replacement. For multi-instructions
replacement, we need to make detour code and wait for all running
interruption. (of course, there are other static code limitations,
as I described at "Safety check" section in patch 0/10.)
Thank you,
--
Masami Hiramatsu
Software Engineer
Hitachi Computer Products (America), Inc.
Software Solutions Division
e-mail: mhiramat@redhat.com