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re: RFA: loader Elf64 loader & split insn/data accessors
- To: sid at sources dot redhat dot com
- subject: re: RFA: loader Elf64 loader & split insn/data accessors
- From: matthew green <mrg at cygnus dot com>
- Date: Sun, 14 Jan 2001 16:04:48 +1100
- organisation: Red Hat, Inc.
OK, done. i still need to finish the debugger changes for this also.
this is the debugger patch. it adds a new "debugger_bus_insn" to each
component, default to the insn_bus (as "debugger_bus" defaults to the
data_bus). in the GDB component, it looks for the "debugger-bus-insn"
for accesses with bit 33 set, or in the old "debugger-bus" otherwise.
i've tested this change with a couple of internal ports and it seems
to work OK...
.mrg.
[component/gdb/ChangeLog]
2001-01-14 matthew green <mrg@redhat.com>
* gdb.cxx (gdb::process_get_mem): Use "debugger-bus-insn" for
addresses with bit 33 set.
(gdb::process_set_mem): Likewise.
[include/ChangeLog]
2001-01-14 matthew green <mrg@redhat.com>
* include/sidcpuutil.h (basic_cpu): New debugger_bus_insn bus
for debugger access to the instruction bus, attribute name of
"debugger-bus-insn".
Index: component/gdb/gdb.cxx
===================================================================
RCS file: /cvs/cvsfiles/devo/sid/component/gdb/gdb.cxx,v
retrieving revision 1.36
diff -p -r1.36 gdb.cxx
*** gdb.cxx 2001/01/04 17:08:41 1.36
--- gdb.cxx 2001/01/14 04:31:46
*************** gdb::process_get_mem (struct gdbserv_reg
*** 545,563 ****
gdbserv_output_string (gdbserv, "E01");
return;
}
- sid::bus* memory = cpu->find_bus ("debugger-bus");
- if (! memory)
- {
- cerr << "No debugger-bus!" << endl;
- gdbserv_output_string (gdbserv, "E02");
- return;
- }
endian e;
component::status s =
parse_attribute (cpu->attribute_value ("endian"), e);
if (s != component::ok) assert (e == endian_unknown);
// XXX: 64-bit addresses unsupported
if (0 && addr8 >= (1ULL << 32))
{
--- 545,570 ----
gdbserv_output_string (gdbserv, "E01");
return;
}
endian e;
component::status s =
parse_attribute (cpu->attribute_value ("endian"), e);
if (s != component::ok) assert (e == endian_unknown);
+ // XXX: 33-bit addresses -> 0x1.0000.0000 -> insn ram
+ string which_bus;
+ if (addr8 & 0x100000000ULL)
+ which_bus = "debugger-bus-insn";
+ else
+ which_bus = "debugger-bus";
+ sid::bus* memory = cpu->find_bus (which_bus);
+ if (!memory)
+ {
+ cerr << "No " << which_bus << "!" << endl;
+ gdbserv_output_string (gdbserv, "E02");
+ return;
+ }
+
// XXX: 64-bit addresses unsupported
if (0 && addr8 >= (1ULL << 32))
{
*************** gdb::process_set_mem (struct gdbserv_reg
*** 625,642 ****
gdbserv_output_string (gdbserv, "E01");
return;
}
- sid::bus* memory = cpu->find_bus ("debugger-bus");
- if (! memory)
- {
- cerr << "No debugger-bus!" << endl;
- gdbserv_output_string (gdbserv, "E02");
- return;
- }
endian e;
component::status s =
parse_attribute (cpu->attribute_value ("endian"), e);
if (s != component::ok) assert (e == endian_unknown);
// XXX: 64-bit addresses unsupported
if (0 && addr8 >= (1ULL << 32))
--- 632,656 ----
gdbserv_output_string (gdbserv, "E01");
return;
}
endian e;
component::status s =
parse_attribute (cpu->attribute_value ("endian"), e);
if (s != component::ok) assert (e == endian_unknown);
+
+ // XXX: 33-bit addresses -> 0x1.0000.0000 -> insn ram
+ string which_bus;
+ if (addr8 & 0x100000000ULL)
+ which_bus = "debugger-bus-insn";
+ else
+ which_bus = "debugger-bus";
+ sid::bus* memory = cpu->find_bus (which_bus);
+ if (! memory)
+ {
+ cerr << "No " << which_bus << "!" << endl;
+ gdbserv_output_string (gdbserv, "E02");
+ return;
+ }
// XXX: 64-bit addresses unsupported
if (0 && addr8 >= (1ULL << 32))
Index: include/sidcpuutil.h
===================================================================
RCS file: /cvs/cvsfiles/devo/sid/include/sidcpuutil.h,v
retrieving revision 1.17
diff -p -r1.17 sidcpuutil.h
*** sidcpuutil.h 2001/01/10 19:41:02 1.17
--- sidcpuutil.h 2001/01/14 04:31:46
*************** namespace sidutil
*** 350,355 ****
--- 350,356 ----
// debugger access functions
private:
passthrough_bus debugger_bus;
+ passthrough_bus debugger_bus_insn;
virtual std::string dbg_get_reg (sid::host_int_4 n) = 0;
virtual sid::component::status dbg_set_reg (sid::host_int_4 n, const std::string& s) = 0;
*************** public:
*** 402,408 ****
flush_icache_pin (this, & basic_cpu::flush_icache_pin_handler),
pc_set_pin (this, & basic_cpu::pc_set_pin_handler),
endian_set_pin (this, & basic_cpu::endian_set_pin_handler),
! debugger_bus (& this->data_bus)
{
// buses
this->data_bus = 0;
--- 403,410 ----
flush_icache_pin (this, & basic_cpu::flush_icache_pin_handler),
pc_set_pin (this, & basic_cpu::pc_set_pin_handler),
endian_set_pin (this, & basic_cpu::endian_set_pin_handler),
! debugger_bus (& this->data_bus),
! debugger_bus_insn (& this->insn_bus)
{
// buses
this->data_bus = 0;
*************** public:
*** 410,415 ****
--- 412,418 ----
this->insn_bus = 0;
add_accessor ("insn-memory", & this->insn_bus);
add_bus ("debugger-bus", & this->debugger_bus);
+ add_bus ("debugger-bus-insn", & this->debugger_bus_insn);
// pins
add_pin ("step!", & this->step_pin);