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src/sid/component cgen-cpu/xstormy16/ChangeLog ...


CVSROOT:	/cvs/src
Module name:	src
Changes by:	nickc@sourceware.org	2010-11-03 17:02:33

Modified files:
	sid/component/cgen-cpu/xstormy16: ChangeLog xstormy16-sem.cxx 
	sid/component/testsuite/sidcomp.cgen-cpu.xstormy16: ChangeLog 
	                                                    movgrgrii.cgs 
	                                                    movgrgriipostinc.cgs 
	                                                    movgrgriipredec.cgs 
	                                                    movgrgripostinc.cgs 
	                                                    movgrgripredec.cgs 
	                                                    movgrigr.cgs 
	                                                    movgriipostincgr.cgs 
	                                                    movgripostincgr.cgs 
	                                                    movgripredecgr.cgs 
	                                                    rrcgrgr.cgs 
	                                                    rrcgrimm4.cgs 
	                                                    testutils.inc 
Added files:
	sid/component/testsuite/sidcomp.cgen-cpu.xstormy16: 
	                                                    movfgrgriipostinc.cgs 
	                                                    movfgrgriipredec.cgs 
	                                                    movfgriipostincgr.cgs 
	                                                    movfgriipredecgr.cgs 

Log message:
	* cpu/xstormy16.cpu (alignfix-mem-far): New macro.  Like
	alignfix-mem, but works with 32-bit addresses.
	(set-alignfix-mem-far): New macro.  Like set-alignfix-mem but
	works with 32-bit addresses.
	(movfgrgri, movfgrgripostinc, movfgrgripredec, movfgrgrii,
	movfgrgriipostinc, movfgrgriipredec): Use alignfix-mem-far.
	(movfgrigr, movfgripostincgr, movfgripredecgr): Use
	set-alignfix-mem-far.
	(movfgrgriipostinc, movfgriipostincgr): Propagate addition to
	source register into base register.
	(movfgrgriipredec, movfgriipredecgr): Propagate subtraction from
	source register into base register.
	
	* xstormy16-sem.cxx: Regenerate.
	
	* testutils.inc (pass): Update parameter layout for write syscall.
	(fail): Likewise.
	* movgrgrii.cgs: Fix endianness typo in assertion.
	* movgrgriipostinc.cgs: Likewise.
	* movgrgriipredec.cgs: Likewise.
	* movgrgripostinc.cgs: Likewise.
	* movgrgripredec.cgs: Likewise.
	* movgrigr.cgs: Likewise.
	* movgriipostincgr.cgs: Likewise.
	* movgripostincgr.cgs: Likewise.
	* movgripredecgr.cgs: Likewise.
	* rrcgrgr.cgs: Rotate only inserts carry flag once.
	* rrcgrimm4.cgs: Likewise.
	* movfgrgriipostinc.cgs: New test.  Checks MOVF load with post increment.
	* movfgrgriipredec.cgs: New test.  Checks MOVF load with pre decrement.
	* movfgriipostincgr.cgs: New test.  Checks MOVF store with post increment.
	* movfgriipostincgr.cgs: New test.  Checks MOVF store with pre decrement.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/xstormy16/ChangeLog.diff?cvsroot=src&r1=1.24&r2=1.25
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/xstormy16/xstormy16-sem.cxx.diff?cvsroot=src&r1=1.13&r2=1.14
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movfgrgriipostinc.cgs.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movfgrgriipredec.cgs.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movfgriipostincgr.cgs.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movfgriipredecgr.cgs.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/ChangeLog.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgrii.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipostinc.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgriipredec.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripostinc.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrgripredec.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgrigr.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgriipostincgr.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripostincgr.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/movgripredecgr.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrgr.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/rrcgrimm4.cgs.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sid/component/testsuite/sidcomp.cgen-cpu.xstormy16/testutils.inc.diff?cvsroot=src&r1=1.1&r2=1.2


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