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RE: [Patch] ARM define atomic_exchange_acq/atomic_exchange_rel to __atomic_exchange_n
- From: Abhishek Deb <adeb at nvidia dot com>
- To: Dinar Temirbulatov <dinar at kugelworks dot com>
- Cc: "libc-ports at sourceware dot org" <libc-ports at sourceware dot org>, "joseph at codesourcery dot com" <joseph at codesourcery dot com>
- Date: Fri, 16 Aug 2013 19:41:49 -0700
- Subject: RE: [Patch] ARM define atomic_exchange_acq/atomic_exchange_rel to __atomic_exchange_n
- References: <CANoaTN2hKTZ7GZCMsYqai25PHO7GLb56huLosR7+dgjAEK2FGQ at mail dot gmail dot com> <0E42B6C0C4628E48B8DF5D3F3C8FCA8898F1F8BF56 at HQMAIL02 dot nvidia dot com> <CANoaTN0MFzWmG8e7cuWkw067qp_p_UgsABtBXCcY+8CZRADzeg at mail dot gmail dot com>
Dinar,
As I said currently __arch_compare_and_exchange_val_32_acq is defined to __sync_val_compare_and_swap ((mem), (oldval), (newval)), which probably uses two dmb.
Can't __atomic_compare_exchange_n be used and appropriate memodel be specified for acquire and release variants?
-----Original Message-----
From: Dinar Temirbulatov [mailto:dinar@kugelworks.com]
Sent: Friday, August 16, 2013 3:58 PM
To: Abhishek Deb
Cc: libc-ports@sourceware.org; joseph@codesourcery.com
Subject: Re: [Patch] ARM define atomic_exchange_acq/atomic_exchange_rel to __atomic_exchange_n
Hello Abhishek,
>However, taking a deeper look into atomic_compare_and_exchange_acq/rel, following is how the compiled code looks like
>
> 34: f57ff05f dmb sy
> 38: e1903f9f ldrex r3, [r0]
> 3c: e3530000 cmp r3, #0
> 40: 1a000002 bne 50
> 44: e1801f92 strex r1, r2, [r0]
> 48: e3510000 cmp r1, #0
> 4c: 1afffff9 bne 38
> 50: e3530000 cmp r3, #0
> 54: f57ff05f dmb sy
> 58: 1afffff5 bne 34
oh, I see that lll_unlock looks correct on my side:
.LBB12:
.loc 1 42 0
dmb sy
.L21:
ldrex r2, [r4]
strex r1, r3, [r4]
cmp r1, #0
bne .L21
.LVL10:
and for example __lll_cond_lock/__lll_timedlock also look right.
But, I see that for lll_lock defined as :
#define __lll_lock(futex, private) \
((void) ({ \
int *__futex = (futex); \
if (__builtin_expect (atomic_compare_and_exchange_val_acq (__futex, \
1, 0), 0)) \
{ \
if (__builtin_constant_p (private) && (private) == LLL_PRIVATE) \
__lll_lock_wait_private (__futex); \
else \
__lll_lock_wait (__futex, private); \
} \
}))
and we could see that on instruction level it looks like this:
dmb sy
.L91:
ldrex r0, [r4]
cmp r0, r3
bne .L92
strex r1, r7, [r4]
cmp r1, #0
bne .L91
.L92:
.LBE10:
.loc 1 204 0
cmp r3, r0
.LBB11:
.loc 1 202 0
dmb sy
, so nothing wrong on my side.
thanks, Dinar.