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Re: [PATCH] Remove alpha specific fmax, fmin to fix sNaN handling [BZ #20947]
On 02/01/2018 16:32, Joseph Myers wrote:
> On Tue, 2 Jan 2018, Adhemerval Zanella wrote:
>
>> I haven't tested if it is the case of an emulated instruction (I currently
>> I do not have access to rebuild/reinstall new kernel on the machine), but
>> since I am checking on EV68CB I guess it is not.
>
> If the instruction sets inexact in hardware (I was going on 4.7.6.4
> IEEE-Compliant Arithmetic Without Inexact Exception, "this model does not
> signal inexact results either by the inexact status flag or by trapping"),
> then indeed you need to avoid using the instruction or avoid any inexact
> bit from it being set on return from the function (while of course if
> inexact was set on entry to the function, it still needs to be set on
> return from the function, so you can't simply clear inexact after the
> instruction).
>
Although the manual I am using (Alpha Architecture Handbook version 3),
notes that CVTfi OUTPUT Exceptions (B.3 Mapping to IEEE Standard)
should not generate Inexact, the manual of the chip I am testing it
(Alpha 21264 [1]) states at A.8 IEEE Floating-Point Conformance that
CVTfi and CVTif OUTPUT does generate inexact exception for inexact
result. I think easier solution is just use generic implementation
for alpha.
[1] https://www.star.bnl.gov/public/daq/HARDWARE/21264_data_sheet.pdf