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Re: [PATCH] powerpc: Use aligned stores in memset
- From: Florian Weimer <fweimer at redhat dot com>
- To: munroesj at linux dot vnet dot ibm dot com
- Cc: Rajalakshmi Srinivasaraghavan <raji at linux dot vnet dot ibm dot com>, libc-alpha at sourceware dot org
- Date: Tue, 12 Sep 2017 19:04:24 +0200
- Subject: Re: [PATCH] powerpc: Use aligned stores in memset
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On 09/12/2017 04:16 PM, Steven Munroe wrote:
> On Tue, 2017-09-12 at 16:08 +0200, Florian Weimer wrote:
>> * Steven Munroe:
>>
>>>> This means that GCC introduced an unaligned store, no matter how memset
>>>> was implemented.
>>>>
>>> C will do what ever the programmer wants. We can not stop that.
>>
>> That's not true. If some specification says that for POWER, mem* must
>> behave in a certain way, and the GCC/glibc combiniation does not do
>> that, that's a bug on POWER.
>>
> What is the bug that you think we are not fixing?
memset, as called by the C programmer, still uses unaligned stores.
>> The programmer only sees the entire toolchain, and it is our job to
>> make the whole thing compliant with applicable specifications, even if
>> this means coordinating among different projects.
>>
>>> And in user mode and cache coherent memory this is not a problem as
>>> Adhemerval explained.
>>
>> Obviously not, otherwise we wouldn't be changing glibc.
>>
> I was arguing against forcing GCC and compilers in general being forced
> to be aware of Cache Inhibited memory. Programmers do.
Exactly. In order to give programmers this choice, you need functions
like device_memset, which are not subject to compiler or library
optimizations which are not valid for device memory.
> What are you arguing?
If you want a memset which is compatible with device memory, you need to
fix GCC *and* glibc. Just patching glibc is not enough because GCC
optimizes memset in ways that are incompatible with your apparent goal..
Thanks,
Florian