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Re: [PATCH] powerpc: Use aligned stores in memset
- From: "Tulio Magno Quites Machado Filho" <tuliom at linux dot vnet dot ibm dot com>
- To: Rajalakshmi Srinivasaraghavan <raji at linux dot vnet dot ibm dot com>, libc-alpha at sourceware dot org
- Cc:
- Date: Sun, 20 Aug 2017 23:20:36 -0300
- Subject: Re: [PATCH] powerpc: Use aligned stores in memset
- Authentication-results: sourceware.org; auth=none
- References: <1503033107-20047-1-git-send-email-raji@linux.vnet.ibm.com>
Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> writes:
> The powerpc hardware does not allow unaligned accesses on non cacheable
> memory. This patch avoids misaligned stores for sizes less than 8 in
> memset to avoid such cases. Tested on powerpc64 and powerpc64le.
This commit message is misleading. I think it's necessary to improve with:
1. Remove the first line.
2. Mention the performance impact and what causes it.
3. Reference the section "3.1.4.2 Alignment Interrupts" of the "POWER8
Processor User's Manual for the Single-Chip Module", which describes
this behavior.
4. Mention which kind of programs are affected by the old behavior.
> 2017-08-17 Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
>
> * sysdeps/powerpc/powerpc64/power8/memset.S: Store byte by byte
> for unaligned inputs if size is less than 8.
> ---
> sysdeps/powerpc/powerpc64/power8/memset.S | 68 ++++++++++++++++++++++++++++++-
> 1 file changed, 66 insertions(+), 2 deletions(-)
>
> diff --git a/sysdeps/powerpc/powerpc64/power8/memset.S b/sysdeps/powerpc/powerpc64/power8/memset.S
> index 7ad3bb1b00..504bab0841 100644
> --- a/sysdeps/powerpc/powerpc64/power8/memset.S
> +++ b/sysdeps/powerpc/powerpc64/power8/memset.S
> @@ -377,7 +377,8 @@ L(write_LT_32):
> subf r5,r0,r5
>
> 2: bf 30,1f
> - sth r4,0(r10)
> + stb r4,0(r10)
> + stb r4,1(r10)
Needs a comment to prevent future mistakes in the future.
> @@ -437,11 +438,74 @@ L(tail5):
> /* Handles copies of 0~8 bytes. */
> .align 4
> L(write_LE_8):
> - bne cr6,L(tail4)
> + /* Use stb instead of sth which is safe for
> + both aligned and unaligned inputs. */
I don't think "safe" is the correct term. What about this?
Use stb instead of sth because it doesn't generate alignment interrupts
on cache-inhibited storage.
> + bne cr6,L(LE7_tail4)
> + /* If input is word aligned, use stw, Else use stb. */
s/Else/else/
--
Tulio Magno