This is the mail archive of the libc-alpha@sourceware.org mailing list for the glibc project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] powerpc: fix sysconf support for cache geometries


On 06/15/2017 04:53 PM, Paul Clarke wrote:
On 06/15/2017 04:03 PM, Richard Henderson wrote:
On 06/15/2017 01:45 PM, Paul Clarke wrote:
Any thoughts on falling back to AT_*CACHEBSIZE for _SC_LEVEL1_*CACHE_LINESIZE
for older kernels where AT_L1*_CACHEGEOMETRY is not present?

Ben'll tell you (as he told me ;-) that those aren't the same thing.  The
former, "CACHEBSIZE", is the cache block size, which is the unit size for
cache operations (e.g. "Cache Block Touch", "Cache Block Clear", etc.).  The
latter, "CACHE_LINESIZE", is, well, the cache line size (with respect to
associativity, etc.).
Yeah, yeah, but... show me where it's different, for L1, in practice.

Did you want to respin your sysconf patch? I notice you also included L4,
which always returns 0, a value, unlike my patch, which will fail (return -1,
EINVAL). Yours may be preferred in that regard, since the "names" for the L4
queries are not completely unknown.

-1 without EINVAL is, afaik, an indication that L4 does not exist.
Whereas 0 indicates that we don't know.

That said, I really don't care about the deep cache hierarchy, so I'm fine with either as a result.


r~


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]