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[PATCH] mips: Fix store/load gp registers to/from ucontext_t

From: Gordana Cmiljanovic <Gordana dot Cmiljanovic at imgtec dot com>
To: "libc-alpha at sourceware dot org" <libc-alpha at sourceware dot org>
Date: Wed, 17 May 2017 13:41:12 +0000
Subject: [PATCH] mips: Fix store/load gp registers to/from ucontext_t
Authentication-results: sourceware.org; auth=none

More details, not to be included in the commit message:

get/set/make/swap context implementations for MIPS O32
incorrectly assume general purpose registers are 32bit
but they are defined as 64bit in mcontext_t structure, as per:

https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/mips/sys/ucontext.h;h=f766dacd205f49a479f17b19df476a8103f55a2e;hb=refs/heads/master#l35
and
https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/mips/sys/ucontext.h;h=f766dacd205f49a479f17b19df476a8103f55a2e;hb=refs/heads/master#l68

This leads to incorrect general purpose register values.

General purpose registers in mcontext_t structure
are 8 bytes long for both MIPS32/MIPS64.

get/set/make/swap context implementations for MIPS O32
incorrectly assume that general purpose registers
in this structure are 4 bytes long.

This patch is fixing that.

Tested for MIPS O32.

2017-05-17  Gordana Cmiljanovic  <gordana.cmiljanovic@imgtec.com>

	* sysdeps/unix/sysv/linux/mips/getcontext.S: Define MCONTEXT_SZGREG as
	8 and use it when copying general purpose registers.
	* sysdeps/unix/sysv/linux/mips/makecontext.S: Likewise.
	* sysdeps/unix/sysv/linux/mips/setcontext.S: Likewise.
	* sysdeps/unix/sysv/linux/mips/swapcontext.S: Likewise.
diff --git a/sysdeps/unix/sysv/linux/mips/getcontext.S b/sysdeps/unix/sysv/linux/mips/getcontext.S
index 64de2eb..8e4fe3b 100644
--- a/sysdeps/unix/sysv/linux/mips/getcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/getcontext.S
@@ -38,6 +38,7 @@ MASK = 0x10000000
 #endif
 FRAMESZ = ((LOCALSZ * SZREG) + ALSZ) & ALMASK
 GPOFF = FRAMESZ - (1 * SZREG)
+MCONTEXT_SZGREG = 8
 
 NESTED (__getcontext, FRAMESZ, ra)
 	.mask	MASK, 0
@@ -74,22 +75,22 @@ NESTED (__getcontext, FRAMESZ, ra)
 
 	/* Store a magic flag.	*/
 	li	v1, 1
-	REG_S	v1, (0 * SZREG + MCONTEXT_GREGS)(a0)	/* zero */
-
-	REG_S	s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
+	REG_S	v1, (0 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)	/* zero */
+
+	REG_S	s0, (16 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s1, (17 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s2, (18 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s3, (19 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s4, (20 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s5, (21 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s6, (22 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s7, (23 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
 #if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
-	REG_S	_GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
+	REG_S	_GP, (28 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
 #endif
-	REG_S	_SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
+	REG_S	_SP, (29 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	fp, (30 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	ra, (31 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
 	REG_S	ra, MCONTEXT_PC(a0)
 
 #ifdef __mips_hard_float
diff --git a/sysdeps/unix/sysv/linux/mips/makecontext.S b/sysdeps/unix/sysv/linux/mips/makecontext.S
index 5c3af04..0b63d03 100644
--- a/sysdeps/unix/sysv/linux/mips/makecontext.S
+++ b/sysdeps/unix/sysv/linux/mips/makecontext.S
@@ -53,6 +53,7 @@ NARGREGS = 8
 A3OFF = FRAMESZ + (3 * SZREG)				/* caller-allocated */
 NARGREGS = 4
 #endif
+MCONTEXT_SZGREG = 8
 
 NESTED (__makecontext, FRAMESZ, ra)
 	.mask	MASK, -(ARGSZ * SZREG)
@@ -89,7 +90,7 @@ NESTED (__makecontext, FRAMESZ, ra)
 
 	/* Store a magic flag.  */
 	li	v1, 1
-	REG_S	v1, (0 * SZREG + MCONTEXT_GREGS)(a0)	/* zero */
+	REG_S	v1, (0 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)	/* zero */
 
 	/* Set up the stack.  */
 	PTR_L	t0, STACK_SP(a0)
@@ -100,14 +101,14 @@ NESTED (__makecontext, FRAMESZ, ra)
 	blez	a2, 2f					/* no arguments */
 
 	/* Store register arguments.  */
-	PTR_ADDIU t2, a0, MCONTEXT_GREGS + 4 * SZREG
+	PTR_ADDIU t2, a0, MCONTEXT_GREGS + 4 * MCONTEXT_SZGREG
 	move	t3, zero
 0:
 	addiu	t3, 1
 	REG_L	v1, (t1)
 	PTR_ADDIU t1, SZREG
 	REG_S	v1, (t2)
-	PTR_ADDIU t2, SZREG
+	PTR_ADDIU t2, MCONTEXT_SZGREG
 	bgeu	t3, a2, 2f				/* all done */
 	bltu	t3, NARGREGS, 0b			/* next */
 
@@ -138,12 +139,12 @@ NESTED (__makecontext, FRAMESZ, ra)
 #else
 	PTR_LA	t9, 99f
 #endif
-	REG_S	t0, (29 * SZREG + MCONTEXT_GREGS)(a0)	/* sp */
-	REG_S	v1, (16 * SZREG + MCONTEXT_GREGS)(a0)	/* s0 */
+	REG_S	t0, (29 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)	/* sp */
+	REG_S	v1, (16 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)	/* s0 */
 #ifdef __PIC__
-	REG_S	gp, (17 * SZREG + MCONTEXT_GREGS)(a0)	/* s1 */
+	REG_S	gp, (17 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)	/* s1 */
 #endif
-	REG_S	t9, (31 * SZREG + MCONTEXT_GREGS)(a0)	/* ra */
+	REG_S	t9, (31 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)	/* ra */
 	REG_S	a1, MCONTEXT_PC(a0)
 
 #ifdef __PIC__
diff --git a/sysdeps/unix/sysv/linux/mips/setcontext.S b/sysdeps/unix/sysv/linux/mips/setcontext.S
index 4e363d9..efdc3fe 100644
--- a/sysdeps/unix/sysv/linux/mips/setcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/setcontext.S
@@ -47,6 +47,7 @@ A0OFF = FRAMESZ - (1 * SZREG)				/* callee-allocated */
 #else
 A0OFF = FRAMESZ + (0 * SZREG)				/* caller-allocated */
 #endif
+MCONTEXT_SZGREG = 8
 
 NESTED (__setcontext, FRAMESZ, ra)
 	.mask	MASK, -(ARGSZ * SZREG)
@@ -73,7 +74,7 @@ NESTED (__setcontext, FRAMESZ, ra)
 
 	/* Check for the magic flag.  */
 	li	v0, 1
-	REG_L	v1, (0 * SZREG + MCONTEXT_GREGS)(a0)	/* zero */
+	REG_L	v1, (0 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)	/* zero */
 	bne	v0, v1, 98f
 
 	REG_S	a0, A0OFF(sp)
@@ -117,31 +118,31 @@ NESTED (__setcontext, FRAMESZ, ra)
 
 	/* Note the contents of argument registers will be random
 	   unless makecontext() has been called.  */
-	REG_L	a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	a0, (4 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a1, (5 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a2, (6 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a3, (7 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 #if _MIPS_SIM != _ABIO32
-	REG_L	a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	a4, (8 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a5, (9 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a6, (10 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a7, (11 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 #endif
 
-	REG_L	s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	s0, (16 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s1, (17 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s2, (18 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s3, (19 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s4, (20 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s5, (21 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s6, (22 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s7, (23 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 #if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
-	REG_L	gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	gp, (28 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 #endif
-	REG_L	sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	sp, (29 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	fp, (30 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	ra, (31 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 	REG_L	t9, MCONTEXT_PC(v0)
 
 	move	v0, zero
diff --git a/sysdeps/unix/sysv/linux/mips/swapcontext.S b/sysdeps/unix/sysv/linux/mips/swapcontext.S
index fde6e5e..5c72e77 100644
--- a/sysdeps/unix/sysv/linux/mips/swapcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/swapcontext.S
@@ -47,6 +47,7 @@ A1OFF = FRAMESZ - (1 * SZREG)				/* callee-allocated */
 #else
 A1OFF = FRAMESZ + (1 * SZREG)				/* caller-allocated */
 #endif
+MCONTEXT_SZGREG = 8
 
 NESTED (__swapcontext, FRAMESZ, ra)
 	.mask	MASK, -(ARGSZ * SZREG)
@@ -83,22 +84,22 @@ NESTED (__swapcontext, FRAMESZ, ra)
 
 	/* Store a magic flag.	*/
 	li	v1, 1
-	REG_S	v1, (0 * SZREG + MCONTEXT_GREGS)(a0)	/* zero */
-
-	REG_S	s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
+	REG_S	v1, (0 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)	/* zero */
+
+	REG_S	s0, (16 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s1, (17 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s2, (18 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s3, (19 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s4, (20 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s5, (21 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s6, (22 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	s7, (23 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
 #if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
-	REG_S	_GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
+	REG_S	_GP, (28 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
 #endif
-	REG_S	_SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
-	REG_S	ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
+	REG_S	_SP, (29 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	fp, (30 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
+	REG_S	ra, (31 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(a0)
 	REG_S	ra, MCONTEXT_PC(a0)
 
 #ifdef __mips_hard_float
@@ -167,31 +168,31 @@ NESTED (__swapcontext, FRAMESZ, ra)
 
 	/* Note the contents of argument registers will be random
 	   unless makecontext() has been called.  */
-	REG_L	a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	a0, (4 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a1, (5 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a2, (6 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a3, (7 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 #if _MIPS_SIM != _ABIO32
-	REG_L	a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	a4, (8 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a5, (9 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a6, (10 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	a7, (11 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 #endif
 
-	REG_L	s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	s0, (16 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s1, (17 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s2, (18 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s3, (19 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s4, (20 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s5, (21 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s6, (22 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	s7, (23 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 #if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
-	REG_L	gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	gp, (28 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 #endif
-	REG_L	sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
-	REG_L	ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
+	REG_L	sp, (29 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	fp, (30 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
+	REG_L	ra, (31 * MCONTEXT_SZGREG + MCONTEXT_GREGS)(v0)
 	REG_L	t9, MCONTEXT_PC(v0)
 
 	move	v0, zero
-- 
1.9.1

Follow-Ups:
- Re: [PATCH] mips: Fix store/load gp registers to/from ucontext_t
  - From: Adhemerval Zanella
- Re: [PATCH] mips: Fix store/load gp registers to/from ucontext_t
  - From: Joseph Myers

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