[PATCH][AArch64] Add more cfi annotations to tlsdesc entry points
Richard Henderson
rth@twiddle.net
Tue Dec 13 15:11:00 GMT 2016
On 12/13/2016 07:05 AM, Florian Weimer wrote:
> On 12/09/2016 06:38 PM, Richard Henderson wrote:
>> On 12/09/2016 05:23 AM, Szabolcs Nagy wrote:
>>> stp x1, x2, [sp, #32+16*0]
>>> + cfi_rel_offset (x1, 32)
>>> + cfi_rel_offset (x2, 32+8)
>>> stp x3, x4, [sp, #32+16*1]
>>> + cfi_rel_offset (x3, 32+16)
>>> + cfi_rel_offset (x4, 32+24)
>>
>> FWIW, you'll produce equivalent, but smaller unwind info if you put all of the
>> cfi_rel_offsets together (constrained by the assembly for when the original
>> register values change. So
>>
>> stp x1, x2, [sp, #32+16*0]
>> stp x3, x4, [sp, #32+16*1]
>> cfi_rel_offset (x1, 32)
>> cfi_rel_offset (x2, 32+8)
>> cfi_rel_offset (x3, 32+16)
>> cfi_rel_offset (x4, 32+24)
>
> Will this cause problems with async cancellation?
No, because the registers have not been modified. All this does is eliminate
extra "advance" opcodes.
r~
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