Re: [RFC][PATCH 2/2] sparc32: Use cas for atomic_* operations and use general pthread_barrier_wait

[David Miller <davem at davemloft dot net>]

From: David Miller <davem@davemloft.net>
Date: Fri, 04 Nov 2016 14:37:10 -0400 (EDT)

> From: Andreas Larsson <andreas@gaisler.com>
> Date: Tue,  1 Nov 2016 16:07:47 +0100
> 
>> This uses the CASA compare and swap with user space data access ASI 0xa
>> that is present on many LEON3 and LEON4 systems and that is implied by
>> gcc's -mcpu=leon3.
>> 
>> The CASA instruction is used not only for atomic compare and exchange
>> functions, but also atomic exchange functions and atomic write
>> functions. This is to allow the OS kernel to emulate that instruction on
>> systems where it is missing and to get atomicity between all atomic
>> writing functions without having to resort to stop all CPU:s in an SMP
>> system.
> 
> Ok, this is fine.  I'll work on the instruction emulation code for the
> kernel side.

Actually, this might cause some problems actually.

We don't always have access to a proper _dl_hwcap value.  Which means
that we will emit the LEON CAS sometimes when running on a v9 chip
which will not work properly.

I need to think about this a bit more.

Probably what we need to do is have three cases:

1) We explicitly know we are on a v9 chip via dl_hwcap, emit v9 CAS

2) We explicitly know we are on a v8 LEON chip via dl_hwcap, emit LEON CAS

3) Else, we emit a special trap instruction which the kernel fixes up

I think this is necessary because we cannot attempt to execute one of
the two CAS cases on the opposing CAS cpu type.