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Re: [PATCH 2/2] powerpc: Fix operand prefixes
- From: Adhemerval Zanella <adhemerval dot zanella at linaro dot org>
- To: libc-alpha at sourceware dot org
- Date: Wed, 20 Apr 2016 18:20:51 -0300
- Subject: Re: [PATCH 2/2] powerpc: Fix operand prefixes
- Authentication-results: sourceware.org; auth=none
- References: <1461185716-7332-2-git-send-email-gftg at linux dot vnet dot ibm dot com>
LGTM.
On 20-04-2016 17:55, Gabriel F. T. Gomes wrote:
> The file sysdeps/powerpc/sysdeps.h defines aliases for control register
> operands. E.g.: 'cr7' means control register 7. On the one hand, this
> increases readability, as it makes it easier for readers to know whether the
> operand is a control register, a general purpose register or an immediate. On
> the other hand, this permits that control register be written as if they were
> general purpose, and vice-versa, thus reducing the readability of the code.
>
> This commit removes some of these unintentional misuses.
>
> The changes have no effect on the final code. Checked with objdump.
>
> 2016-04-18 Gabriel F. T. Gomes <gftg@linux.vnet.ibm.com>
>
> * sysdeps/powerpc/powerpc64/power8/strncpy.S: Fix use of control
> registers specifiers where general purpose registers specifiers should
> have been used.
> ---
> sysdeps/powerpc/powerpc64/power8/strncpy.S | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/sysdeps/powerpc/powerpc64/power8/strncpy.S b/sysdeps/powerpc/powerpc64/power8/strncpy.S
> index 0bb3bd4..437edeb 100644
> --- a/sysdeps/powerpc/powerpc64/power8/strncpy.S
> +++ b/sysdeps/powerpc/powerpc64/power8/strncpy.S
> @@ -294,7 +294,7 @@ L(pagecross):
> #endif
> orc r9,r7,r9 /* Mask bits that are not part of the
> string. */
> - li cr7,0
> + li r7,0
> cmpb r9,r9,r7 /* Check for null bytes in DWORD1. */
> cmpdi cr7,r9,0
> bne cr7,L(short_path_prepare_2)
> @@ -305,14 +305,14 @@ L(pagecross):
> /* For next checks we have aligned address, so we check for more
> three doublewords to make sure we can read 16 unaligned bytes
> to start the bulk copy with 16 aligned addresses. */
> - ld cr7,8(r11)
> + ld r7,8(r11)
> cmpb r9,r7,r9
> cmpdi cr7,r9,0
> bne cr7,L(short_path_prepare_2)
> - addi cr7,r8,-8
> + addi r7,r8,-8
> cmpldi cr7,r7,8
> ble cr7,L(short_path_prepare_2)
> - ld cr7,16(r11)
> + ld r7,16(r11)
> cmpb r9,r7,r9
> cmpdi cr7,r9,0
> bne cr7,L(short_path_prepare_2)
>