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Re: RFC Migrating PowerPC to IEEE 128-bit Floating Point
- From: Joseph Myers <joseph at codesourcery dot com>
- To: Andreas Schwab <schwab at suse dot de>
- Cc: Steven Munroe <munroesj at linux dot vnet dot ibm dot com>, Carlos O'Donell <carlos at redhat dot com>, <libc-alpha at sourceware dot org>, Tulio Magno Quites Machado Filho <tuliom at linux dot vnet dot ibm dot com>, Ulrich Weigand <Ulrich dot Weigand at de dot ibm dot com>, Michael Meissner <meissner at linux dot vnet dot ibm dot com>, David Edelsohn <dje dot gcc at gmail dot com>, <jakub at redhat dot com>
- Date: Wed, 14 Oct 2015 12:13:10 +0000
- Subject: Re: RFC Migrating PowerPC to IEEE 128-bit Floating Point
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On Wed, 14 Oct 2015, Andreas Schwab wrote:
> Joseph Myers <joseph@codesourcery.com> writes:
>
> > but I strongly suspect that some of the code in
> > sysdeps/ieee754/ldbl-96 does not handle the m68k variant fully
> > correctly.)
>
> m68k uses only a few of them, and I don't think any of them is testing
> for subnormal values.
I'm pretty sure that fmal is not correct for m68k. There are lots of
conditionals to avoid internal underflow when the final result does not
underflow, while ensuring correctly rounded results with underflow
exception when such an exception is correct. All of those conditionals
are analogous to those for flt-32 / dbl-64 / ldbl-128 and make no
allowance for the m68k format - and testcases were generally written to
cover problem cases for those formats and for the Intel version of ldbl-96
and so may not expose problems for m68k either. (Some conditionals may be
safe for m68k for one reason or another, but probably not all.)
--
Joseph S. Myers
joseph@codesourcery.com