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RE: [RFC 2/2] Update prototype of IFUNC resolver for MIPS


On Mon, 14 Sep 2015, Matthew Fortune wrote:

> The primary reason for needing FR=1 is for MSA to be usable. Simply
> seeing that MSA is available via a HWCAP is not enough as we have to
> tell the dynamic linker to lock itself into FR=1/FP64 mode while the
> ifunc's module is loaded. In fact it may not even be possible to enter
> FR=1 mode because of the modules which are already loaded.

And it's not possible to have a pseudo-HWCAP bit (with a reservation so 
the kernel won't allocate it) that means "can use FP64 mode", or the IFUNC 
can't switch to FP64 mode using existing public interfaces so having such 
a bit wouldn't be sufficient?

I think the "GNU ifunc - work in progress please ignore" sections of 
<https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking> 
need expanding to explain the proposed ABI here.

-- 
Joseph S. Myers
joseph@codesourcery.com


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