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Re: [PATCH] Don't use SSE4_2 instructions on Intel Silvermont Micro Architecture.
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Dmitrieva Liubov <liubov dot dmitrieva at gmail dot com>
- Cc: Ondřej Bílka <neleai at seznam dot cz>, GNU C Library <libc-alpha at sourceware dot org>
- Date: Mon, 17 Jun 2013 11:07:33 -0700
- Subject: Re: [PATCH] Don't use SSE4_2 instructions on Intel Silvermont Micro Architecture.
- References: <CAHjhQ93=uegeZg9iTqoJ+PFuUrvn8e2mA8tZ96Jy4CaV6aPbWg at mail dot gmail dot com> <20130617163729 dot GA15981 at domone dot kolej dot mff dot cuni dot cz> <CAHjhQ93zmP525hqW-2RnHBREc_949XLnm7sE-CSv3Nj8PQgUig at mail dot gmail dot com>
On Mon, Jun 17, 2013 at 10:56 AM, Dmitrieva Liubov
<liubov.dmitrieva@gmail.com> wrote:
> I checked that functions.
> In case of strspn/strcspn/strpbrk to switch SSE4_2 off is bad because
> there are no optimized sse2 versions to call instead.
> Default versions are not sse there.
>
> So, it seems we need to create a new flag for Silvermont like
> "slowPcmpistri" and fix switches in functions where optimized sse2
> exist.
>
> Or implement optimized sse2 strspn/strcspn/strpbrk and switch SSE4_2 completely.
>
We can add bit_Prefer_SSE2_for_stringop. When it is set, we
will use SSE2 version if it is available. Otherwise, we use
SSE4_2 version if it is available.
H.J.