[PATCH] Don't use SSE4_2 instructions on Intel Silvermont Micro Architecture.

[Dmitrieva Liubov <liubov dot dmitrieva at gmail dot com>]

The second patch for Silvermont we hope to have in 2.18.

SSE4_2 instructions can be executed on Silvermont, so some string
functions like strchr where sse4_2 version is available were switched
to sse4_2 versions. But it produces huge regressions.

It would be good to switch SSE4_2 bit off.

Tested on my machine.
Ok to commit?


ChangeLog:

2013-06-17  Liubov Dmitrieva  <liubov.dmitrieva@intel.com>

* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
Never use SSE4_2 instructions for Intel Silvermont architecture.


diff --git a/sysdeps/x86_64/multiarch/init-arch.c
b/sysdeps/x86_64/multiarch/init-arch.c
index 9524aee..ad1f088 100644
--- a/sysdeps/x86_64/multiarch/init-arch.c
+++ b/sysdeps/x86_64/multiarch/init-arch.c
@@ -83,6 +83,8 @@ __init_cpu_features (void)
                 on Silvermont.  */
              __cpu_features.feature[index_Fast_Unaligned_Load]
                |= bit_Fast_Unaligned_Load;
+             /* SSE4_2 instructions are slow on Silvermont.  */
+             __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx &= !bit_SSE4_2;
              break;

            default: