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Re: [drow@false.org: Re: DB_THREAD support in Berkeley DB/glibc]
On Tue, Dec 28, 1999 at 03:30:25PM -0800, Geoff Keating wrote:
> No, it should be a 'long' (actually, an 'int'). Changing tsl_t is right.
> If you _can't_ change tsl_t, you need to do something like:
<code with masks and shifts>
Well, I'm assuming that there will be no problem with changing it.
> > +#define TSL_SET(tsl) ({ \
> > + register tsl_t *__l = (tsl); \
> > + register tsl_t __r1; \
> > + __asm__ volatile(" \n\
> > + sync \n\
> > + 10: lwarx %0,0,%1 \n\
> > + cmpwi %0,0 \n\
> > + bne+ 20f \n\
> > + stwcx. %2,0,%1 \n\
> > + bne- 10b \n\
> > + sync \n\
> > + 20: " \
> > + : "=&r" (__r1) \
> > + : "r" (__l), "r" (1) : "cr0", "memory"); \
> > + !__r1; \
> > +})
>
> You don't need to say 'volatile' here. The 'memory' clobber handles
> it.
>
> > +
> > +#define TSL_UNSET(tsl) ({ \
> > + register tsl_t *__l = (tsl); \
> > + __asm__ __volatile__(" \n\
> > + sync \n\
> > + stw %1, %0" : "=&r" (__l) : "r" (0)); \
> > + })
>
> This won't work. You do need the 'memory' clobber. You want
Oops, knew I forgot something.
>
> #define TSL_UNSET(tsl) do { \
> __asm__ ("sync" : : : "memory"); \
> *tsl = 0; \
> } while (0)
>
> This will ensure that any memory stores that were made before the
> 'sync' are visible before *tsl is reset to zero. If it is also
> necessary that the change to *tsl is visible before any subsequent
> stores, you can duplicate the 'asm' after the store.
And the memory clobber guarantees that the asm won't get shifted to the
other side of the assignment, right? Gotcha.
>
> You need MUTEX_ALIGNMENT=32 for powerpc.
Why? Will lwarx not work on things only word-aligned?
Dan
/--------------------------------\ /--------------------------------\
| Daniel Jacobowitz |__| SCS Class of 2002 |
| Debian GNU/Linux Developer __ Carnegie Mellon University |
| dan@debian.org | | dmj+@andrew.cmu.edu |
\--------------------------------/ \--------------------------------/