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GNU C Library master sources branch master updated. glibc-2.26-33-g8537e0f


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http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=8537e0f6cf8a1c245612fd3437789d2e16278e3b

commit 8537e0f6cf8a1c245612fd3437789d2e16278e3b
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri Aug 4 13:03:44 2017 -0700

    x86-64: Implement libmathvec IFUNC selectors in C
    
    	* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines)
    	Add svml_d_cos2_core-sse2, svml_d_cos4_core-sse,
    	svml_d_cos8_core-avx2, svml_d_exp2_core-sse2,
    	svml_d_exp4_core-sse, svml_d_exp8_core-avx2,
    	svml_d_log2_core-sse2, svml_d_log4_core-sse,
    	svml_d_log8_core-avx2, svml_d_pow2_core-sse2,
    	svml_d_pow4_core-sse, svml_d_pow8_core-avx2
    	svml_d_sin2_core-sse2, svml_d_sin4_core-sse,
    	svml_d_sin8_core-avx2, svml_d_sincos2_core-sse2,
    	svml_d_sincos4_core-sse, svml_d_sincos8_core-avx2,
    	svml_s_cosf16_core-avx2, svml_s_cosf4_core-sse2,
    	svml_s_cosf8_core-sse, svml_s_expf16_core-avx2,
    	svml_s_expf4_core-sse2, svml_s_expf8_core-sse,
    	svml_s_logf16_core-avx2, svml_s_logf4_core-sse2,
    	svml_s_logf8_core-sse, svml_s_powf16_core-avx2,
    	svml_s_powf4_core-sse2, svml_s_powf8_core-sse,
    	svml_s_sincosf16_core-avx2, svml_s_sincosf4_core-sse2,
    	svml_s_sincosf8_core-sse, svml_s_sinf16_core-avx2,
    	svml_s_sinf4_core-sse2 and svml_s_sinf8_core-sse.
    	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h: New file.
    	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN2v_cos): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN4v_cos): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN8v_cos): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN2v_exp): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN4v_exp): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN8v_exp): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN2v_log): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN4v_log): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN8v_log): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN2vv_pow): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN4vv_pow): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN8vv_pow): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN2v_sin): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN4v_sin): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN8v_sin): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN2vvv_sincos): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN4vvv_sincos): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN8vvv_sincos): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN16v_cosf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN4v_cosf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN8v_cosf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN16v_expf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN4v_expf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN8v_expf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN16v_logf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN4v_logf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN8v_logf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN16vv_powf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN4vv_powf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN8vv_powf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN16vvv_sincosf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN4vvv_sincosf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN8vvv_sincosf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core-avx2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVeN16v_sinf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core-sse2.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVbN4v_sinf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core.S:  Renamed to
    	...
    	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core-sse.S: This.
    	Don't include <sysdep.h> nor <init-arch.h>.
    	(_ZGVdN8v_sinf): Removed.

diff --git a/ChangeLog b/ChangeLog
index 421a0e0..2684362 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,246 @@
 2017-08-04  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines)
+	Add svml_d_cos2_core-sse2, svml_d_cos4_core-sse,
+	svml_d_cos8_core-avx2, svml_d_exp2_core-sse2,
+	svml_d_exp4_core-sse, svml_d_exp8_core-avx2,
+	svml_d_log2_core-sse2, svml_d_log4_core-sse,
+	svml_d_log8_core-avx2, svml_d_pow2_core-sse2,
+	svml_d_pow4_core-sse, svml_d_pow8_core-avx2
+	svml_d_sin2_core-sse2, svml_d_sin4_core-sse,
+	svml_d_sin8_core-avx2, svml_d_sincos2_core-sse2,
+	svml_d_sincos4_core-sse, svml_d_sincos8_core-avx2,
+	svml_s_cosf16_core-avx2, svml_s_cosf4_core-sse2,
+	svml_s_cosf8_core-sse, svml_s_expf16_core-avx2,
+	svml_s_expf4_core-sse2, svml_s_expf8_core-sse,
+	svml_s_logf16_core-avx2, svml_s_logf4_core-sse2,
+	svml_s_logf8_core-sse, svml_s_powf16_core-avx2,
+	svml_s_powf4_core-sse2, svml_s_powf8_core-sse,
+	svml_s_sincosf16_core-avx2, svml_s_sincosf4_core-sse2,
+	svml_s_sincosf8_core-sse, svml_s_sinf16_core-avx2,
+	svml_s_sinf4_core-sse2 and svml_s_sinf8_core-sse.
+	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h: New file.
+	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2v_cos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4v_cos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8v_cos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2v_exp): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4v_exp): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8v_exp): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2v_log): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4v_log): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8v_log): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2vv_pow): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4vv_pow): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8vv_pow): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2v_sin): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_sin): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN8v_sin): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN2vvv_sincos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN4vvv_sincos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN8vvv_sincos): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16v_cosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_cosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_cosf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8v_cosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16v_expf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_expf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_expf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8v_expf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16v_logf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_logf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_logf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8v_logf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16vv_powf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4vv_powf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_powf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8vv_powf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16vvv_sincosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4vvv_sincosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sincosf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8vvv_sincosf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf16_core-avx2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVeN16v_sinf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf4_core-sse2.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVbN4v_sinf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core.S:  Renamed to
+	...
+	* sysdeps/x86_64/fpu/multiarch/svml_d_sinf8_core-sse.S: This.
+	Don't include <sysdep.h> nor <init-arch.h>.
+	(_ZGVdN8v_sinf): Removed.
+
+2017-08-04  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines):
 	Add s_ceil-sse4_1, s_ceilf-sse4_1, s_floor-sse4_1,
 	s_floorf-sse4_1, s_nearbyint-sse4_1, s_nearbyintf-sse4_1,
diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile
index 86ddde3..f9ceb09 100644
--- a/sysdeps/x86_64/fpu/multiarch/Makefile
+++ b/sysdeps/x86_64/fpu/multiarch/Makefile
@@ -70,5 +70,35 @@ libmvec-sysdep_routines += svml_d_cos2_core_sse4 svml_d_cos4_core_avx2 \
 			   svml_d_pow4_core_avx2 svml_d_pow8_core_avx512 \
 			   svml_s_powf4_core_sse4 svml_s_powf8_core_avx2 \
 			   svml_s_powf16_core_avx512 svml_s_sincosf4_core_sse4 \
-			   svml_s_sincosf8_core_avx2 svml_s_sincosf16_core_avx512
+			   svml_s_sincosf8_core_avx2 \
+			   svml_s_sincosf16_core_avx512 \
+			   svml_d_cos2_core-sse2 svml_d_cos4_core-sse \
+			   svml_d_cos8_core-avx2 svml_d_exp2_core-sse2 \
+			   svml_d_exp4_core-sse svml_d_exp8_core-avx2 \
+			   svml_d_log2_core-sse2 svml_d_log4_core-sse \
+			   svml_d_log8_core-avx2 svml_d_pow2_core-sse2 \
+			   svml_d_pow4_core-sse svml_d_pow8_core-avx2 \
+			   svml_d_sin2_core-sse2 svml_d_sin4_core-sse \
+			   svml_d_sin8_core-avx2 \
+			   svml_d_sincos2_core-sse2 \
+			   svml_d_sincos4_core-sse \
+			   svml_d_sincos8_core-avx2 \
+			   svml_s_cosf16_core-avx2 \
+			   svml_s_cosf4_core-sse2 \
+			   svml_s_cosf8_core-sse \
+			   svml_s_expf16_core-avx2 \
+			   svml_s_expf4_core-sse2 \
+			   svml_s_expf8_core-sse \
+			   svml_s_logf16_core-avx2 \
+			   svml_s_logf4_core-sse2 \
+			   svml_s_logf8_core-sse \
+			   svml_s_powf16_core-avx2 \
+			   svml_s_powf4_core-sse2 \
+			   svml_s_powf8_core-sse \
+			   svml_s_sincosf16_core-avx2 \
+			   svml_s_sincosf4_core-sse2 \
+			   svml_s_sincosf8_core-sse \
+			   svml_s_sinf16_core-avx2 \
+			   svml_s_sinf4_core-sse2 \
+			   svml_s_sinf8_core-sse
 endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h
similarity index 56%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
copy to sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h
index b994a79..a43d4c5 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h
@@ -1,5 +1,6 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Common definition for libmathvec ifunc selections optimized with
+   AVX2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +17,22 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
 #include <init-arch.h>
 
-	.text
-ENTRY (_ZGVdN4v_exp)
-        .type   _ZGVdN4v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_exp_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_exp_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_exp)
-libmvec_hidden_def (_ZGVdN4v_exp)
-
-#define _ZGVdN4v_exp _ZGVdN4v_exp_sse_wrapper
-#include "../svml_d_exp4_core.S"
+#undef PASTER2
+#define PASTER2(x,y)	x##_##y
+
+extern void REDIRECT_NAME (void);
+extern __typeof (REDIRECT_NAME) OPTIMIZE (sse_wrapper) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (avx2) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (void)
+{
+  const struct cpu_features* cpu_features = __get_cpu_features ();
+
+  if (CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
+    return OPTIMIZE (avx2);
+
+  return OPTIMIZE (sse_wrapper);
+}
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h
similarity index 50%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
copy to sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h
index 46d35a2..1857e1f 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h
@@ -1,5 +1,6 @@
-/* Multiple versions of vectorized cos, vector length is 8.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Common definition for libmathvec ifunc selections optimized with
+   AVX512.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,22 +17,26 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
 #include <init-arch.h>
 
-	.text
-ENTRY (_ZGVeN8v_cos)
-        .type   _ZGVeN8v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-1:      leaq    _ZGVeN8v_cos_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_cos_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_cos_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_cos)
-
-#define _ZGVeN8v_cos _ZGVeN8v_cos_avx2_wrapper
-#include "../svml_d_cos8_core.S"
+#undef PASTER2
+#define PASTER2(x,y)	x##_##y
+
+extern void REDIRECT_NAME (void);
+extern __typeof (REDIRECT_NAME) OPTIMIZE (avx2_wrapper) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (knl) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (skx) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (void)
+{
+  const struct cpu_features* cpu_features = __get_cpu_features ();
+
+  if (CPU_FEATURES_ARCH_P (cpu_features, AVX512DQ_Usable))
+    return OPTIMIZE (skx);
+
+  if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable))
+    return OPTIMIZE (knl);
+
+  return OPTIMIZE (avx2_wrapper);
+}
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
copy to sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h
index b994a79..fcd0e68 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h
@@ -1,5 +1,6 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Common definition for libmathvec ifunc selections optimized with
+   SSE4.1.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +17,22 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
 #include <init-arch.h>
 
-	.text
-ENTRY (_ZGVdN4v_exp)
-        .type   _ZGVdN4v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_exp_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_exp_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_exp)
-libmvec_hidden_def (_ZGVdN4v_exp)
-
-#define _ZGVdN4v_exp _ZGVdN4v_exp_sse_wrapper
-#include "../svml_d_exp4_core.S"
+#undef PASTER2
+#define PASTER2(x,y)	x##_##y
+
+extern void REDIRECT_NAME (void);
+extern __typeof (REDIRECT_NAME) OPTIMIZE (sse2) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (sse4) attribute_hidden;
+
+static inline void *
+IFUNC_SELECTOR (void)
+{
+  const struct cpu_features* cpu_features = __get_cpu_features ();
+
+  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_1))
+    return OPTIMIZE (sse4);
+
+  return OPTIMIZE (sse2);
+}
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S
similarity index 66%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S
index b209492..82601e7 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cos, vector length is 2.
+/* SSE2 version of vectorized cos, vector length is 2.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2v_cos)
-        .type   _ZGVbN2v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_cos_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_cos_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_cos)
-libmvec_hidden_def (_ZGVbN2v_cos)
-
 #define _ZGVbN2v_cos _ZGVbN2v_cos_sse2
 #include "../svml_d_cos2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c
similarity index 61%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c
index b209492..f5645c7 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c
@@ -1,5 +1,5 @@
 /* Multiple versions of vectorized cos, vector length is 2.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN2v_cos
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_cos)
-        .type   _ZGVbN2v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_cos_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_cos_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_cos)
-libmvec_hidden_def (_ZGVbN2v_cos)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_cos _ZGVbN2v_cos_sse2
-#include "../svml_d_cos2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_cos, __GI__ZGVbN2v_cos, __redirect__ZGVbN2v_cos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S
similarity index 66%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S
index ff382e9..cd928f2 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cos, vector length is 4.
+/* SSE version of vectorized cos, vector length is 4.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4v_cos)
-        .type   _ZGVdN4v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_cos_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_cos_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_cos)
-libmvec_hidden_def (_ZGVdN4v_cos)
-
 #define _ZGVdN4v_cos _ZGVdN4v_cos_sse_wrapper
 #include "../svml_d_cos4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c
similarity index 60%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c
index ff382e9..7b29e25 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c
@@ -1,5 +1,5 @@
 /* Multiple versions of vectorized cos, vector length is 4.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN4v_cos
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVdN4v_cos)
-        .type   _ZGVdN4v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_cos_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_cos_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_cos)
-libmvec_hidden_def (_ZGVdN4v_cos)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVdN4v_cos _ZGVdN4v_cos_sse_wrapper
-#include "../svml_d_cos4_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4v_cos, __GI__ZGVdN4v_cos, __redirect__ZGVdN4v_cos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S
similarity index 63%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S
index 46d35a2..b4c8ae2 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cos, vector length is 8.
+/* AVX2 version of vectorized cos, vector length is 8.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8v_cos)
-        .type   _ZGVeN8v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-1:      leaq    _ZGVeN8v_cos_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_cos_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_cos_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_cos)
-
 #define _ZGVeN8v_cos _ZGVeN8v_cos_avx2_wrapper
 #include "../svml_d_cos8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c
similarity index 58%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c
index 46d35a2..6d30baa 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c
@@ -1,5 +1,5 @@
 /* Multiple versions of vectorized cos, vector length is 8.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,22 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN8v_cos
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVeN8v_cos)
-        .type   _ZGVeN8v_cos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-1:      leaq    _ZGVeN8v_cos_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_cos_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_cos_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_cos)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVeN8v_cos _ZGVeN8v_cos_avx2_wrapper
-#include "../svml_d_cos8_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8v_cos, __GI__ZGVeN8v_cos, __redirect__ZGVeN8v_cos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S
similarity index 68%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S
index 5a17e11..a66b82c 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized exp.
+/* SSE2 version of vectorized exp.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
-
 #define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
 #include "../svml_d_exp2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c
index 5a17e11..e24758d 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized exp, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN2v_exp
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_exp, __GI__ZGVbN2v_exp, __redirect__ZGVbN2v_exp)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S
index b994a79..613fae1 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized exp.
+/* SSE version of vectorized exp.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4v_exp)
-        .type   _ZGVdN4v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_exp_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_exp_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_exp)
-libmvec_hidden_def (_ZGVdN4v_exp)
-
 #define _ZGVdN4v_exp _ZGVdN4v_exp_sse_wrapper
 #include "../svml_d_exp4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c
index 5a17e11..d3a9d87 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized exp, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN4v_exp
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4v_exp, __GI__ZGVdN4v_exp, __redirect__ZGVdN4v_exp)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S
similarity index 64%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S
index 6189080..9b95236 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized exp.
+/* AVX2 version of vectorized exp.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8v_exp)
-        .type   _ZGVeN8v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8v_exp_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_exp_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_exp_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_exp)
-
 #define _ZGVeN8v_exp _ZGVeN8v_exp_avx2_wrapper
 #include "../svml_d_exp8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c
index 5a17e11..cf8cd50 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized exp, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN8v_exp
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8v_exp, __GI__ZGVeN8v_exp, __redirect__ZGVeN8v_exp)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S
index 5097add..a8bffcc 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized log.
+/* SSE2 version of vectorized log.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-        .text
-ENTRY (_ZGVbN2v_log)
-        .type   _ZGVbN2v_log, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_log_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_log_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_log)
-libmvec_hidden_def (_ZGVbN2v_log)
-
 #define _ZGVbN2v_log _ZGVbN2v_log_sse2
 #include "../svml_d_log2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c
index 5a17e11..2fcc08a 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized log, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN2v_log
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_log, __GI__ZGVbN2v_log, __redirect__ZGVbN2v_log)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S
index 1e9a2f4..0760b04 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized log.
+/* SSE version of vectorized log.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4v_log)
-        .type   _ZGVdN4v_log, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_log_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_log_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_log)
-libmvec_hidden_def (_ZGVdN4v_log)
-
 #define _ZGVdN4v_log _ZGVdN4v_log_sse_wrapper
 #include "../svml_d_log4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c
index 5a17e11..1756978 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized log, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN4v_log
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4v_log, __GI__ZGVdN4v_log, __redirect__ZGVdN4v_log)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S
similarity index 64%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S
index 43f572d..af3229f 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized log.
+/* AVX2 version of vectorized log.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8v_log)
-        .type   _ZGVeN8v_log, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8v_log_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_log_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_log_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_log)
-
 #define _ZGVeN8v_log _ZGVeN8v_log_avx2_wrapper
 #include "../svml_d_log8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c
index 5a17e11..1d9864c 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized log, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN8v_log
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8v_log, __GI__ZGVeN8v_log, __redirect__ZGVeN8v_log)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S
index adb0872..2e8d40b 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized pow.
+/* SSE2 version of vectorized pow.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2vv_pow)
-        .type   _ZGVbN2vv_pow, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2vv_pow_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2vv_pow_sse2(%rip), %rax
-        ret
-END (_ZGVbN2vv_pow)
-libmvec_hidden_def (_ZGVbN2vv_pow)
-
 #define _ZGVbN2vv_pow _ZGVbN2vv_pow_sse2
 #include "../svml_d_pow2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c
index 5a17e11..bc72a77 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized pow, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN2vv_pow
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2vv_pow, __GI__ZGVbN2vv_pow,
+	       __redirect__ZGVbN2vv_pow)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S
index eea8af6..7f17a7c 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized pow.
+/* SSE version of vectorized pow.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4vv_pow)
-        .type   _ZGVdN4vv_pow, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4vv_pow_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4vv_pow_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4vv_pow)
-libmvec_hidden_def (_ZGVdN4vv_pow)
-
 #define _ZGVdN4vv_pow _ZGVdN4vv_pow_sse_wrapper
 #include "../svml_d_pow4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c
index 5a17e11..f4b4db0 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized pow, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN4vv_pow
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4vv_pow, __GI__ZGVdN4vv_pow,
+	       __redirect__ZGVdN4vv_pow)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S
similarity index 64%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S
index 68f12b2..02a4bdd 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized pow.
+/* AVX2 version of vectorized pow.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8vv_pow)
-        .type   _ZGVeN8vv_pow, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8vv_pow_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8vv_pow_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8vv_pow_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8vv_pow)
-
 #define _ZGVeN8vv_pow _ZGVeN8vv_pow_avx2_wrapper
 #include "../svml_d_pow8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c
index 5a17e11..178f581 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized pow, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN8vv_pow
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8vv_pow, __GI__ZGVeN8vv_pow,
+	       __redirect__ZGVeN8vv_pow)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S
similarity index 68%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S
index e35654b..9b49c3c 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sin.
+/* SSE2 version of vectorized sin.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2v_sin)
-        .type   _ZGVbN2v_sin, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_sin_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_sin_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_sin)
-libmvec_hidden_def (_ZGVbN2v_sin)
-
 #define _ZGVbN2v_sin _ZGVbN2v_sin_sse2
 #include "../svml_d_sin2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c
index 5a17e11..a0995e7 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sin, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN2v_sin
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2v_sin, __GI__ZGVbN2v_sin, __redirect__ZGVbN2v_sin)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S
similarity index 66%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S
index f4482d3..0f27cef 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sin, vector length is 4.
+/* SSE version of vectorized sin, vector length is 4.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4v_sin)
-        .type   _ZGVdN4v_sin, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_sin_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_sin_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_sin)
-libmvec_hidden_def (_ZGVdN4v_sin)
-
 #define _ZGVdN4v_sin _ZGVdN4v_sin_sse_wrapper
 #include "../svml_d_sin4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c
similarity index 60%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c
index f4482d3..44ff161 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c
@@ -1,5 +1,5 @@
 /* Multiple versions of vectorized sin, vector length is 4.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN4v_sin
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVdN4v_sin)
-        .type   _ZGVdN4v_sin, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4v_sin_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4v_sin_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4v_sin)
-libmvec_hidden_def (_ZGVdN4v_sin)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVdN4v_sin _ZGVdN4v_sin_sse_wrapper
-#include "../svml_d_sin4_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4v_sin, __GI__ZGVdN4v_sin, __redirect__ZGVdN4v_sin)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S
index 2b15889..89cabc3 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sin.
+/* AVX2 version of vectorized sin.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -19,19 +19,5 @@
 #include <sysdep.h>
 #include <init-arch.h>
 
-	.text
-ENTRY (_ZGVeN8v_sin)
-        .type   _ZGVeN8v_sin, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8v_sin_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_sin_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8v_sin_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8v_sin)
-
 #define _ZGVeN8v_sin _ZGVeN8v_sin_avx2_wrapper
 #include "../svml_d_sin8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c
index 5a17e11..0391268 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sin, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,12 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN8v_sin
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8v_sin, __GI__ZGVeN8v_sin, __redirect__ZGVeN8v_sin)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S
similarity index 66%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S
index 13279e3..7c15800 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincos.
+/* SSE2 version of vectorized sincos.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2vvv_sincos)
-        .type   _ZGVbN2vvv_sincos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2vvv_sincos_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2vvv_sincos_sse2(%rip), %rax
-        ret
-END (_ZGVbN2vvv_sincos)
-libmvec_hidden_def (_ZGVbN2vvv_sincos)
-
 #define _ZGVbN2vvv_sincos _ZGVbN2vvv_sincos_sse2
 #include "../svml_d_sincos2_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c
index 5a17e11..5902894 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sincos, vector length is 2.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN2vvv_sincos
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN2vvv_sincos, __GI__ZGVbN2vvv_sincos,
+	       __redirect__ZGVbN2vvv_sincos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S
similarity index 66%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S
index 8aacb8e..739efc3 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincos.
+/* SSE version of vectorized sincos.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN4vvv_sincos)
-        .type   _ZGVdN4vvv_sincos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN4vvv_sincos_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN4vvv_sincos_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN4vvv_sincos)
-libmvec_hidden_def (_ZGVdN4vvv_sincos)
-
 #define _ZGVdN4vvv_sincos _ZGVdN4vvv_sincos_sse_wrapper
 #include "../svml_d_sincos4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c
index 5a17e11..d55aa6f 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sincos, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN4vvv_sincos
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN4vvv_sincos, __GI__ZGVdN4vvv_sincos,
+	       __redirect__ZGVdN4vvv_sincos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S
similarity index 62%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S
index 5a17e11..026d93c 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized exp.
+/* AVX2 version of vectorized sincos.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
-
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#define _ZGVeN8vvv_sincos _ZGVeN8vvv_sincos_avx2_wrapper
+#include "../svml_d_sincos8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S
deleted file mode 100644
index 3c0abc3..0000000
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/* Multiple versions of vectorized sincos.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <http://www.gnu.org/licenses/>.  */
-
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN8vvv_sincos)
-        .type   _ZGVeN8vvv_sincos, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN8vvv_sincos_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN8vvv_sincos_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN8vvv_sincos_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN8vvv_sincos)
-
-#define _ZGVeN8vvv_sincos _ZGVeN8vvv_sincos_avx2_wrapper
-#include "../svml_d_sincos8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c
index 5a17e11..f78146f 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sincos, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN8vvv_sincos
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN8vvv_sincos, __GI__ZGVeN8vvv_sincos,
+	       __redirect__ZGVeN8vvv_sincos)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core-avx2.S
similarity index 64%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core-avx2.S
index cd67665..f9c0023 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cosf.
+/* AVX2 version of vectorized cosf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16v_cosf)
-        .type   _ZGVeN16v_cosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16v_cosf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_cosf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_cosf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16v_cosf)
-
 #define _ZGVeN16v_cosf _ZGVeN16v_cosf_avx2_wrapper
 #include "../svml_s_cosf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.c
index 5a17e11..186c012 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized cosf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN16v_cosf
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16v_cosf, __GI__ZGVeN16v_cosf,
+	       __redirect__ZGVeN16v_cosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core-sse2.S
similarity index 66%
copy from sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core-sse2.S
index d73d7c7..6a4ba6a 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cosf, vector length is 4.
+/* SSE2 version of vectorized cosf, vector length is 4.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4v_cosf)
-        .type   _ZGVbN4v_cosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4v_cosf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4v_cosf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4v_cosf)
-libmvec_hidden_def (_ZGVbN4v_cosf)
-
 #define _ZGVbN4v_cosf _ZGVbN4v_cosf_sse2
 #include "../svml_s_cosf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.c
similarity index 61%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.c
index d73d7c7..8eb5e03 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.c
@@ -1,5 +1,5 @@
 /* Multiple versions of vectorized cosf, vector length is 4.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN4v_cosf
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN4v_cosf)
-        .type   _ZGVbN4v_cosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4v_cosf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4v_cosf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4v_cosf)
-libmvec_hidden_def (_ZGVbN4v_cosf)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN4v_cosf _ZGVbN4v_cosf_sse2
-#include "../svml_s_cosf4_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4v_cosf, __GI__ZGVbN4v_cosf,
+	       __redirect__ZGVbN4v_cosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core-sse.S
similarity index 66%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core-sse.S
index f7530c1..3a4741b 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized cosf, vector length is 8.
+/* SSE version of vectorized cosf, vector length is 8.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8v_cosf)
-        .type   _ZGVdN8v_cosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8v_cosf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8v_cosf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8v_cosf)
-libmvec_hidden_def (_ZGVdN8v_cosf)
-
 #define _ZGVdN8v_cosf _ZGVdN8v_cosf_sse_wrapper
 #include "../svml_s_cosf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.c
index 5a17e11..13d2e9d 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized cosf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN8v_cosf
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8v_cosf, __GI__ZGVdN8v_cosf,
+	       __redirect__ZGVdN8v_cosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S
index 3998f61..9ff196e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized expf.
+/* AVX2 version of vectorized expf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -19,19 +19,5 @@
 #include <sysdep.h>
 #include <init-arch.h>
 
-	.text
-ENTRY (_ZGVeN16v_expf)
-        .type   _ZGVeN16v_expf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16v_expf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_expf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_expf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16v_expf)
-
 #define _ZGVeN16v_expf _ZGVeN16v_expf_avx2_wrapper
 #include "../svml_s_expf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.c
index 5a17e11..42566ac 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized expf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN16v_expf
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16v_expf, __GI__ZGVeN16v_expf,
+	       __redirect__ZGVeN16v_expf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core-sse2.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core-sse2.S
index 8051720..393e420 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized expf.
+/* SSE2 version of vectorized expf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4v_expf)
-        .type   _ZGVbN4v_expf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4v_expf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4v_expf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4v_expf)
-libmvec_hidden_def (_ZGVbN4v_expf)
-
 #define _ZGVbN4v_expf _ZGVbN4v_expf_sse2
 #include "../svml_s_expf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.c
index 5a17e11..5218e3d 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized expf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN4v_expf
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4v_expf, __GI__ZGVbN4v_expf,
+	       __redirect__ZGVbN4v_expf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core-sse.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core-sse.S
index 6ffb1fd..a75b601 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized expf.
+/* SSE version of vectorized expf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8v_expf)
-        .type   _ZGVdN8v_expf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8v_expf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8v_expf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8v_expf)
-libmvec_hidden_def (_ZGVdN8v_expf)
-
 #define _ZGVdN8v_expf _ZGVdN8v_expf_sse_wrapper
 #include "../svml_s_expf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.c
index 5a17e11..6badac4 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized expf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN8v_expf
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8v_expf, __GI__ZGVdN8v_expf,
+	       __redirect__ZGVdN8v_expf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core-avx2.S
similarity index 64%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core-avx2.S
index 8ab0319..2a87049 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized logf.
+/* AVX2 version of vectorized logf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16v_logf)
-        .type   _ZGVeN16v_logf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16v_logf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_logf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_logf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16v_logf)
-
 #define _ZGVeN16v_logf _ZGVeN16v_logf_avx2_wrapper
 #include "../svml_s_logf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.c
index 5a17e11..81c5653 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized logf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN16v_logf
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16v_logf, __GI__ZGVeN16v_logf,
+	       __redirect__ZGVeN16v_logf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core-sse2.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core-sse2.S
index 4e0e36d..f6ef828 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized logf.
+/* SSE2 version of vectorized logf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4v_logf)
-        .type   _ZGVbN4v_logf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4v_logf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4v_logf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4v_logf)
-libmvec_hidden_def (_ZGVbN4v_logf)
-
 #define _ZGVbN4v_logf _ZGVbN4v_logf_sse2
 #include "../svml_s_logf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.c
index 5a17e11..a32855e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized logf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN4v_logf
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4v_logf, __GI__ZGVbN4v_logf,
+	       __redirect__ZGVbN4v_logf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core-sse.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core-sse.S
index f4b82de..e5a46ef 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized logf.
+/* SSE version of vectorized logf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8v_logf)
-        .type   _ZGVdN8v_logf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8v_logf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8v_logf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8v_logf)
-libmvec_hidden_def (_ZGVdN8v_logf)
-
 #define _ZGVdN8v_logf _ZGVdN8v_logf_sse_wrapper
 #include "../svml_s_logf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.c
index 5a17e11..b4efa7a 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized logf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN8v_logf
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8v_logf, __GI__ZGVdN8v_logf,
+	       __redirect__ZGVdN8v_logf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core-avx2.S
similarity index 62%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core-avx2.S
index 5a17e11..ec6ec70 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized exp.
+/* AVX2 version of vectorized powf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
-
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#define _ZGVeN16vv_powf _ZGVeN16vv_powf_avx2_wrapper
+#include "../svml_s_powf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S
deleted file mode 100644
index 6d10c75..0000000
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/* Multiple versions of vectorized powf.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <http://www.gnu.org/licenses/>.  */
-
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16vv_powf)
-        .type   _ZGVeN16vv_powf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16vv_powf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16vv_powf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16vv_powf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16vv_powf)
-
-#define _ZGVeN16vv_powf _ZGVeN16vv_powf_avx2_wrapper
-#include "../svml_s_powf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.c
index 5a17e11..25c706a 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized powf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN16vv_powf
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16vv_powf, __GI__ZGVeN16vv_powf,
+	       __redirect__ZGVeN16vv_powf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core-sse2.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core-sse2.S
index 785b549..30b77b6 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized powf.
+/* SSE2 version of vectorized powf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4vv_powf)
-        .type   _ZGVbN4vv_powf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4vv_powf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4vv_powf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4vv_powf)
-libmvec_hidden_def (_ZGVbN4vv_powf)
-
 #define _ZGVbN4vv_powf _ZGVbN4vv_powf_sse2
 #include "../svml_s_powf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.c
index 5a17e11..4d9821c 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized powf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN4vv_powf
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4vv_powf, __GI__ZGVbN4vv_powf,
+	       __redirect__ZGVbN4vv_powf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core-sse.S
similarity index 66%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core-sse.S
index 1f6a073..824042d 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized powf.
+/* SSE version of vectorized powf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8vv_powf)
-        .type   _ZGVdN8vv_powf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8vv_powf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8vv_powf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8vv_powf)
-libmvec_hidden_def (_ZGVdN8vv_powf)
-
 #define _ZGVdN8vv_powf _ZGVdN8vv_powf_sse_wrapper
 #include "../svml_s_powf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.c
index 5a17e11..64ac764 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sinf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN8vv_powf
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8vv_powf, __GI__ZGVdN8vv_powf,
+	       __redirect__ZGVdN8vv_powf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core-avx2.S
similarity index 62%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core-avx2.S
index 5a17e11..a145d2f 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized exp.
+/* AVX2 version of vectorized sincosf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
-
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#define _ZGVeN16vvv_sincosf _ZGVeN16vvv_sincosf_avx2_wrapper
+#include "../svml_s_sincosf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
deleted file mode 100644
index 0545460..0000000
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/* Multiple versions of vectorized sincosf.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <http://www.gnu.org/licenses/>.  */
-
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16vvv_sincosf)
-        .type   _ZGVeN16vvv_sincosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16vvv_sincosf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16vvv_sincosf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16vvv_sincosf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16vvv_sincosf)
-
-#define _ZGVeN16vvv_sincosf _ZGVeN16vvv_sincosf_avx2_wrapper
-#include "../svml_s_sincosf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.c
index 5a17e11..ac66a4e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sincosf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN16vvv_sincosf
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16vvv_sincosf, __GI__ZGVeN16vvv_sincosf,
+	       __redirect__ZGVeN16vvv_sincosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core-sse2.S
similarity index 66%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core-sse2.S
index a249be3..dc25091 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincosf.
+/* SSE2 version of vectorized sincosf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4vvv_sincosf)
-        .type   _ZGVbN4vvv_sincosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4vvv_sincosf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4vvv_sincosf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4vvv_sincosf)
-libmvec_hidden_def (_ZGVbN4vvv_sincosf)
-
 #define _ZGVbN4vvv_sincosf _ZGVbN4vvv_sincosf_sse2
 #include "../svml_s_sincosf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.c
index 5a17e11..fc81d43 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sincosf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN4vvv_sincosf
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4vvv_sincosf, __GI__ZGVbN4vvv_sincosf,
+	       __redirect__ZGVbN4vvv_sincosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core-sse.S
similarity index 65%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core-sse.S
index 320fd86..2541297 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sincosf.
+/* SSE version of vectorized sincosf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8vvv_sincosf)
-        .type   _ZGVdN8vvv_sincosf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVdN8vvv_sincosf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8vvv_sincosf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8vvv_sincosf)
-libmvec_hidden_def (_ZGVdN8vvv_sincosf)
-
 #define _ZGVdN8vvv_sincosf _ZGVdN8vvv_sincosf_sse_wrapper
 #include "../svml_s_sincosf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.c
index 5a17e11..cd57ff3 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sincosf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN8vvv_sincosf
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8vvv_sincosf, __GI__ZGVdN8vvv_sincosf,
+	       __redirect__ZGVdN8vvv_sincosf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core-avx2.S
similarity index 64%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core-avx2.S
index 2c18dbc..f7d0c3f 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core-avx2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sinf.
+/* AVX2 version of vectorized sinf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,22 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVeN16v_sinf)
-        .type   _ZGVeN16v_sinf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVeN16v_sinf_skx(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512DQ_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_sinf_knl(%rip), %rax
-	HAS_ARCH_FEATURE (AVX512F_Usable)
-        jnz     2f
-        leaq    _ZGVeN16v_sinf_avx2_wrapper(%rip), %rax
-2:      ret
-END (_ZGVeN16v_sinf)
-
 #define _ZGVeN16v_sinf _ZGVeN16v_sinf_avx2_wrapper
 #include "../svml_s_sinf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.c
index 5a17e11..d2e15f0 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sinf, vector length is 16.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVeN16v_sinf
+#include "ifunc-mathvec-avx512.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVeN16v_sinf, __GI__ZGVeN16v_sinf,
+	       __redirect__ZGVeN16v_sinf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core-sse2.S
similarity index 67%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core-sse2.S
index 3556473..a9de674 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core-sse2.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sinf.
+/* SSE2 version of vectorized sinf.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVbN4v_sinf)
-        .type   _ZGVbN4v_sinf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN4v_sinf_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN4v_sinf_sse2(%rip), %rax
-        ret
-END (_ZGVbN4v_sinf)
-libmvec_hidden_def (_ZGVbN4v_sinf)
-
 #define _ZGVbN4v_sinf _ZGVbN4v_sinf_sse2
 #include "../svml_s_sinf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.c
similarity index 57%
copy from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
copy to sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.c
index 5a17e11..466b798 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sinf, vector length is 4.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVbN4v_sinf
+#include "ifunc-mathvec-sse4_1.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVbN4v_sinf, __GI__ZGVbN4v_sinf,
+	       __redirect__ZGVbN4v_sinf)
+  __attribute__ ((visibility ("hidden")));
+#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core-sse.S
similarity index 66%
rename from sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core-sse.S
index 674e88b..fbf6bd2 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core-sse.S
@@ -1,4 +1,4 @@
-/* Multiple versions of vectorized sinf, vector length is 8.
+/* SSE version of vectorized sinf, vector length is 8.
    Copyright (C) 2014-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
@@ -16,21 +16,5 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
-
-	.text
-ENTRY (_ZGVdN8v_sinf)
-        .type   _ZGVdN8v_sinf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-1:      leaq    _ZGVdN8v_sinf_avx2(%rip), %rax
-	HAS_ARCH_FEATURE (AVX2_Usable)
-        jz      2f
-        ret
-2:      leaq    _ZGVdN8v_sinf_sse_wrapper(%rip), %rax
-        ret
-END (_ZGVdN8v_sinf)
-libmvec_hidden_def (_ZGVdN8v_sinf)
-
 #define _ZGVdN8v_sinf _ZGVdN8v_sinf_sse_wrapper
 #include "../svml_s_sinf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.c
similarity index 57%
rename from sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
rename to sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.c
index 5a17e11..cb5c992 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.c
@@ -1,5 +1,5 @@
-/* Multiple versions of vectorized exp.
-   Copyright (C) 2014-2017 Free Software Foundation, Inc.
+/* Multiple versions of vectorized sinf, vector length is 8.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,21 +16,13 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <sysdep.h>
-#include <init-arch.h>
+#define SYMBOL_NAME _ZGVdN8v_sinf
+#include "ifunc-mathvec-avx2.h"
 
-	.text
-ENTRY (_ZGVbN2v_exp)
-        .type   _ZGVbN2v_exp, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-        leaq    _ZGVbN2v_exp_sse4(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-        jz      2f
-        ret
-2:      leaq    _ZGVbN2v_exp_sse2(%rip), %rax
-        ret
-END (_ZGVbN2v_exp)
-libmvec_hidden_def (_ZGVbN2v_exp)
+libc_ifunc_redirected (REDIRECT_NAME, SYMBOL_NAME, IFUNC_SELECTOR ());
 
-#define _ZGVbN2v_exp _ZGVbN2v_exp_sse2
-#include "../svml_d_exp2_core.S"
+#ifdef SHARED
+__hidden_ver1 (_ZGVdN8v_sinf, __GI__ZGVdN8v_sinf,
+	       __redirect__ZGVdN8v_sinf)
+  __attribute__ ((visibility ("hidden")));
+#endif

http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=10a87ca476bfd3ada1d7ecda377569055ea2891c

commit 10a87ca476bfd3ada1d7ecda377569055ea2891c
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri Aug 4 13:01:59 2017 -0700

    x86-64: Implement libm IFUNC selectors in C
    
    	* sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines):
    	Add s_ceil-sse4_1, s_ceilf-sse4_1, s_floor-sse4_1,
    	s_floorf-sse4_1, s_nearbyint-sse4_1, s_nearbyintf-sse4_1,
    	s_rint-sse4_1 and s_rintf-sse4_1.
    	* sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h: New file.
    	* sysdeps/x86_64/fpu/multiarch/s_ceil.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/s_ceilf.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/s_floor.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/s_floorf.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/s_nearbyint.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/s_rint.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/s_rintf.c: Likewise.
    	* sysdeps/x86_64/fpu/multiarch/s_ceil.S: Renamed to ...
    	* sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S: This.  Don't
    	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
    	(__ceil): Removed.
    	* sysdeps/x86_64/fpu/multiarch/s_ceilf.S: Renamed to ...
    	* sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S: This.  Don't
    	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
    	(__ceilf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/s_floor.S: Renamed to ...
    	* sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S: This.  Don't
    	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
    	(__floor): Removed.
    	* sysdeps/x86_64/fpu/multiarch/s_floorf.S: Renamed to ...
    	* sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S: This.  Don't
    	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
    	(__floorf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/s_nearbyint.S: Renamed to ...
    	* sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S: This.  Don't
    	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
    	(__nearbyint): Removed.
    	* sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S: Renamed to ...
    	* sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S: This.  Don't
    	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
    	(__nearbyintf): Removed.
    	* sysdeps/x86_64/fpu/multiarch/s_rint.S: Renamed to ...
    	* sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S: This.  Don't
    	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
    	(__rint): Removed.
    	* sysdeps/x86_64/fpu/multiarch/s_rintf.S: Renamed to ...
    	* sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S: This.  Don't
    	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
    	(__rintf): Removed.

diff --git a/ChangeLog b/ChangeLog
index acfcdcc..421a0e0 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,53 @@
 2017-08-04  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines):
+	Add s_ceil-sse4_1, s_ceilf-sse4_1, s_floor-sse4_1,
+	s_floorf-sse4_1, s_nearbyint-sse4_1, s_nearbyintf-sse4_1,
+	s_rint-sse4_1 and s_rintf-sse4_1.
+	* sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h: New file.
+	* sysdeps/x86_64/fpu/multiarch/s_ceil.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/s_ceilf.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/s_floor.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/s_floorf.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/s_nearbyint.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/s_rint.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/s_rintf.c: Likewise.
+	* sysdeps/x86_64/fpu/multiarch/s_ceil.S: Renamed to ...
+	* sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S: This.  Don't
+	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
+	(__ceil): Removed.
+	* sysdeps/x86_64/fpu/multiarch/s_ceilf.S: Renamed to ...
+	* sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S: This.  Don't
+	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
+	(__ceilf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/s_floor.S: Renamed to ...
+	* sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S: This.  Don't
+	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
+	(__floor): Removed.
+	* sysdeps/x86_64/fpu/multiarch/s_floorf.S: Renamed to ...
+	* sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S: This.  Don't
+	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
+	(__floorf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/s_nearbyint.S: Renamed to ...
+	* sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S: This.  Don't
+	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
+	(__nearbyint): Removed.
+	* sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S: Renamed to ...
+	* sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S: This.  Don't
+	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
+	(__nearbyintf): Removed.
+	* sysdeps/x86_64/fpu/multiarch/s_rint.S: Renamed to ...
+	* sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S: This.  Don't
+	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
+	(__rint): Removed.
+	* sysdeps/x86_64/fpu/multiarch/s_rintf.S: Renamed to ...
+	* sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S: This.  Don't
+	include <machine/asm.h> nor <init-arch.h>.  Include <sysdep.h>.
+	(__rintf): Removed.
+
+2017-08-04  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* sysdeps/i386/start.S (_start): Check Check PIC instead of
 	SHARED.  Avoid dynamic relocation against main in static PIE.
 
diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile
index 3454215..86ddde3 100644
--- a/sysdeps/x86_64/fpu/multiarch/Makefile
+++ b/sysdeps/x86_64/fpu/multiarch/Makefile
@@ -2,6 +2,10 @@ ifeq ($(subdir),math)
 libm-sysdep_routines += s_floor-c s_ceil-c s_floorf-c s_ceilf-c \
 			s_rint-c s_rintf-c s_nearbyint-c s_nearbyintf-c
 
+libm-sysdep_routines += s_ceil-sse4_1 s_ceilf-sse4_1 s_floor-sse4_1 \
+			s_floorf-sse4_1 s_nearbyint-sse4_1 \
+			s_nearbyintf-sse4_1 s_rint-sse4_1 s_rintf-sse4_1
+
 libm-sysdep_routines += e_exp-fma4 e_log-fma4 e_pow-fma4 s_atan-fma4 \
 			e_asin-fma4 e_atan2-fma4 s_sin-fma4 s_tan-fma4 \
 			mplog-fma4 mpa-fma4 slowexp-fma4 slowpow-fma4 \
diff --git a/sysdeps/x86_64/fpu/multiarch/s_floor.S b/sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h
similarity index 62%
copy from sysdeps/x86_64/fpu/multiarch/s_floor.S
copy to sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h
index f519ab2..ad8d878 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_floor.S
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h
@@ -1,6 +1,6 @@
-/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
+/* Common definition for ifunc selections optimized with SSE4.1.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
-   Contributed by Ulrich Drepper <drepper@gmail.come>, 2011.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -16,23 +16,18 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
 #include <init-arch.h>
 
+extern __typeof (REDIRECT_NAME) OPTIMIZE (c) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (sse41) attribute_hidden;
 
-ENTRY(__floor)
-	.type	__floor, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__floor_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__floor_c(%rip), %rax
-2:	ret
-END(__floor)
-weak_alias (__floor, floor)
+static inline void *
+IFUNC_SELECTOR (void)
+{
+  const struct cpu_features* cpu_features = __get_cpu_features ();
 
+  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_1))
+    return OPTIMIZE (sse41);
 
-ENTRY(__floor_sse41)
-	roundsd	$9, %xmm0, %xmm0
-	ret
-END(__floor_sse41)
+  return OPTIMIZE (c);
+}
diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceil.S b/sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S
similarity index 77%
copy from sysdeps/x86_64/fpu/multiarch/s_ceil.S
copy to sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S
index f8eef43..6d6be97 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_ceil.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S
@@ -16,22 +16,9 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
-
-
-ENTRY(__ceil)
-	.type	__ceil, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__ceil_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__ceil_c(%rip), %rax
-2:	ret
-END(__ceil)
-weak_alias (__ceil, ceil)
-
+#include <sysdep.h>
 
+	.section .text.sse4.1,"ax",@progbits
 ENTRY(__ceil_sse41)
 	roundsd	$10, %xmm0, %xmm0
 	ret
diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceil.S b/sysdeps/x86_64/fpu/multiarch/s_ceil.c
similarity index 63%
rename from sysdeps/x86_64/fpu/multiarch/s_ceil.S
rename to sysdeps/x86_64/fpu/multiarch/s_ceil.c
index f8eef43..2c01957 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_ceil.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_ceil.c
@@ -1,6 +1,6 @@
-/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
+/* Multiple versions of __ceil.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
-   Contributed by Ulrich Drepper <drepper@gmail.come>, 2011.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -16,23 +16,14 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
+#define ceil __redirect_ceil
+#define __ceil __redirect___ceil
+#include <math.h>
+#undef ceil
+#undef __ceil
 
+#define SYMBOL_NAME ceil
+#include "ifunc-sse4_1.h"
 
-ENTRY(__ceil)
-	.type	__ceil, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__ceil_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__ceil_c(%rip), %rax
-2:	ret
-END(__ceil)
+libc_ifunc_redirected (__redirect_ceil, __ceil, IFUNC_SELECTOR ());
 weak_alias (__ceil, ceil)
-
-
-ENTRY(__ceil_sse41)
-	roundsd	$10, %xmm0, %xmm0
-	ret
-END(__ceil_sse41)
diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceilf.S b/sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S
similarity index 77%
copy from sysdeps/x86_64/fpu/multiarch/s_ceilf.S
copy to sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S
index 076f10f..9081ce6 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_ceilf.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S
@@ -16,22 +16,9 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
-
-
-ENTRY(__ceilf)
-	.type	__ceilf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__ceilf_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__ceilf_c(%rip), %rax
-2:	ret
-END(__ceilf)
-weak_alias (__ceilf, ceilf)
-
+#include <sysdep.h>
 
+	.section .text.sse4.1,"ax",@progbits
 ENTRY(__ceilf_sse41)
 	roundss	$10, %xmm0, %xmm0
 	ret
diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceilf.S b/sysdeps/x86_64/fpu/multiarch/s_ceilf.c
similarity index 63%
rename from sysdeps/x86_64/fpu/multiarch/s_ceilf.S
rename to sysdeps/x86_64/fpu/multiarch/s_ceilf.c
index 076f10f..090de04 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_ceilf.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_ceilf.c
@@ -1,6 +1,6 @@
-/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
+/* Multiple versions of __ceilf.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
-   Contributed by Ulrich Drepper <drepper@gmail.come>, 2011.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -16,23 +16,14 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
+#define ceilf __redirect_ceilf
+#define __ceilf __redirect___ceilf
+#include <math.h>
+#undef ceilf
+#undef __ceilf
 
+#define SYMBOL_NAME ceilf
+#include "ifunc-sse4_1.h"
 
-ENTRY(__ceilf)
-	.type	__ceilf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__ceilf_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__ceilf_c(%rip), %rax
-2:	ret
-END(__ceilf)
+libc_ifunc_redirected (__redirect_ceilf, __ceilf, IFUNC_SELECTOR ());
 weak_alias (__ceilf, ceilf)
-
-
-ENTRY(__ceilf_sse41)
-	roundss	$10, %xmm0, %xmm0
-	ret
-END(__ceilf_sse41)
diff --git a/sysdeps/x86_64/fpu/multiarch/s_floor.S b/sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S
similarity index 77%
copy from sysdeps/x86_64/fpu/multiarch/s_floor.S
copy to sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S
index f519ab2..022a4ac 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_floor.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S
@@ -16,22 +16,9 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
-
-
-ENTRY(__floor)
-	.type	__floor, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__floor_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__floor_c(%rip), %rax
-2:	ret
-END(__floor)
-weak_alias (__floor, floor)
-
+#include <sysdep.h>
 
+	.section .text.sse4.1,"ax",@progbits
 ENTRY(__floor_sse41)
 	roundsd	$9, %xmm0, %xmm0
 	ret
diff --git a/sysdeps/x86_64/fpu/multiarch/s_floor.S b/sysdeps/x86_64/fpu/multiarch/s_floor.c
similarity index 63%
rename from sysdeps/x86_64/fpu/multiarch/s_floor.S
rename to sysdeps/x86_64/fpu/multiarch/s_floor.c
index f519ab2..3dd0f81 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_floor.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_floor.c
@@ -1,6 +1,6 @@
-/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
+/* Multiple versions of __floor.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
-   Contributed by Ulrich Drepper <drepper@gmail.come>, 2011.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -16,23 +16,14 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
+#define floor __redirect_floor
+#define __floor __redirect___floor
+#include <math.h>
+#undef floor
+#undef __floor
 
+#define SYMBOL_NAME floor
+#include "ifunc-sse4_1.h"
 
-ENTRY(__floor)
-	.type	__floor, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__floor_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__floor_c(%rip), %rax
-2:	ret
-END(__floor)
+libc_ifunc_redirected (__redirect_floor, __floor, IFUNC_SELECTOR ());
 weak_alias (__floor, floor)
-
-
-ENTRY(__floor_sse41)
-	roundsd	$9, %xmm0, %xmm0
-	ret
-END(__floor_sse41)
diff --git a/sysdeps/x86_64/fpu/multiarch/s_floorf.S b/sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S
similarity index 76%
copy from sysdeps/x86_64/fpu/multiarch/s_floorf.S
copy to sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S
index 8613f73..ea63144 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_floorf.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S
@@ -16,22 +16,9 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
-
-
-ENTRY(__floorf)
-	.type	__floorf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__floorf_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__floorf_c(%rip), %rax
-2:	ret
-END(__floorf)
-weak_alias (__floorf, floorf)
-
+#include <sysdep.h>
 
+	.section .text.sse4.1,"ax",@progbits
 ENTRY(__floorf_sse41)
 	roundss	$9, %xmm0, %xmm0
 	ret
diff --git a/sysdeps/x86_64/fpu/multiarch/s_floorf.S b/sysdeps/x86_64/fpu/multiarch/s_floorf.c
similarity index 63%
rename from sysdeps/x86_64/fpu/multiarch/s_floorf.S
rename to sysdeps/x86_64/fpu/multiarch/s_floorf.c
index 8613f73..d6cf14d 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_floorf.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_floorf.c
@@ -1,6 +1,6 @@
-/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
+/* Multiple versions of __floorf.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
-   Contributed by Ulrich Drepper <drepper@gmail.come>, 2011.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -16,23 +16,14 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
+#define floorf __redirect_floorf
+#define __floorf __redirect___floorf
+#include <math.h>
+#undef floorf
+#undef __floorf
 
+#define SYMBOL_NAME floorf
+#include "ifunc-sse4_1.h"
 
-ENTRY(__floorf)
-	.type	__floorf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__floorf_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__floorf_c(%rip), %rax
-2:	ret
-END(__floorf)
+libc_ifunc_redirected (__redirect_floorf, __floorf, IFUNC_SELECTOR ());
 weak_alias (__floorf, floorf)
-
-
-ENTRY(__floorf_sse41)
-	roundss	$9, %xmm0, %xmm0
-	ret
-END(__floorf_sse41)
diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyint.S b/sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S
similarity index 75%
copy from sysdeps/x86_64/fpu/multiarch/s_nearbyint.S
copy to sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S
index 5a734f6..68934aa 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_nearbyint.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S
@@ -16,22 +16,9 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
-
-
-ENTRY(__nearbyint)
-	.type	__nearbyint, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__nearbyint_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__nearbyint_c(%rip), %rax
-2:	ret
-END(__nearbyint)
-weak_alias (__nearbyint, nearbyint)
-
+#include <sysdep.h>
 
+	.section .text.sse4.1,"ax",@progbits
 ENTRY(__nearbyint_sse41)
 	roundsd	$0xc, %xmm0, %xmm0
 	ret
diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyint.S b/sysdeps/x86_64/fpu/multiarch/s_nearbyint.c
similarity index 62%
rename from sysdeps/x86_64/fpu/multiarch/s_nearbyint.S
rename to sysdeps/x86_64/fpu/multiarch/s_nearbyint.c
index 5a734f6..05579c6 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_nearbyint.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyint.c
@@ -1,6 +1,6 @@
-/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
+/* Multiple versions of __nearbyint.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
-   Contributed by Ulrich Drepper <drepper@gmail.come>, 2011.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -16,23 +16,15 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
+#define nearbyint __redirect_nearbyint
+#define __nearbyint __redirect___nearbyint
+#include <math.h>
+#undef nearbyint
+#undef __nearbyint
 
+#define SYMBOL_NAME nearbyint
+#include "ifunc-sse4_1.h"
 
-ENTRY(__nearbyint)
-	.type	__nearbyint, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__nearbyint_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__nearbyint_c(%rip), %rax
-2:	ret
-END(__nearbyint)
+libc_ifunc_redirected (__redirect_nearbyint, __nearbyint,
+		       IFUNC_SELECTOR ());
 weak_alias (__nearbyint, nearbyint)
-
-
-ENTRY(__nearbyint_sse41)
-	roundsd	$0xc, %xmm0, %xmm0
-	ret
-END(__nearbyint_sse41)
diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S
similarity index 75%
copy from sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S
copy to sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S
index ad79fd6..16bd905 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S
@@ -16,22 +16,9 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
-
-
-ENTRY(__nearbyintf)
-	.type	__nearbyintf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__nearbyintf_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__nearbyintf_c(%rip), %rax
-2:	ret
-END(__nearbyintf)
-weak_alias (__nearbyintf, nearbyintf)
-
+#include <sysdep.h>
 
+	.section .text.sse4.1,"ax",@progbits
 ENTRY(__nearbyintf_sse41)
 	roundss	$0xc, %xmm0, %xmm0
 	ret
diff --git a/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c
similarity index 62%
rename from sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S
rename to sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c
index ad79fd6..e716c94 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c
@@ -1,6 +1,6 @@
-/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
+/* Multiple versions of __nearbyintf.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
-   Contributed by Ulrich Drepper <drepper@gmail.come>, 2011.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -16,23 +16,15 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
+#define nearbyintf __redirect_nearbyintf
+#define __nearbyintf __redirect___nearbyintf
+#include <math.h>
+#undef nearbyintf
+#undef __nearbyintf
 
+#define SYMBOL_NAME nearbyintf
+#include "ifunc-sse4_1.h"
 
-ENTRY(__nearbyintf)
-	.type	__nearbyintf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__nearbyintf_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__nearbyintf_c(%rip), %rax
-2:	ret
-END(__nearbyintf)
+libc_ifunc_redirected (__redirect_nearbyintf, __nearbyintf,
+		       IFUNC_SELECTOR ());
 weak_alias (__nearbyintf, nearbyintf)
-
-
-ENTRY(__nearbyintf_sse41)
-	roundss	$0xc, %xmm0, %xmm0
-	ret
-END(__nearbyintf_sse41)
diff --git a/sysdeps/x86_64/fpu/multiarch/s_rint.S b/sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S
similarity index 77%
copy from sysdeps/x86_64/fpu/multiarch/s_rint.S
copy to sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S
index 4f628a9..9224aa9 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_rint.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S
@@ -16,22 +16,9 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
-
-
-ENTRY(__rint)
-	.type	__rint, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__rint_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__rint_c(%rip), %rax
-2:	ret
-END(__rint)
-weak_alias (__rint, rint)
-
+#include <sysdep.h>
 
+	.section .text.sse4.1,"ax",@progbits
 ENTRY(__rint_sse41)
 	roundsd	$4, %xmm0, %xmm0
 	ret
diff --git a/sysdeps/x86_64/fpu/multiarch/s_rint.S b/sysdeps/x86_64/fpu/multiarch/s_rint.c
similarity index 64%
rename from sysdeps/x86_64/fpu/multiarch/s_rint.S
rename to sysdeps/x86_64/fpu/multiarch/s_rint.c
index 4f628a9..ad44e7c 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_rint.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_rint.c
@@ -1,6 +1,6 @@
-/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
+/* Multiple versions of __rint.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
-   Contributed by Ulrich Drepper <drepper@gmail.come>, 2011.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -16,23 +16,14 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
+#define rint __redirect_rint
+#define __rint __redirect___rint
+#include <math.h>
+#undef rint
+#undef __rint
 
+#define SYMBOL_NAME rint
+#include "ifunc-sse4_1.h"
 
-ENTRY(__rint)
-	.type	__rint, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__rint_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__rint_c(%rip), %rax
-2:	ret
-END(__rint)
+libc_ifunc_redirected (__redirect_rint, __rint, IFUNC_SELECTOR ());
 weak_alias (__rint, rint)
-
-
-ENTRY(__rint_sse41)
-	roundsd	$4, %xmm0, %xmm0
-	ret
-END(__rint_sse41)
diff --git a/sysdeps/x86_64/fpu/multiarch/s_rintf.S b/sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S
similarity index 77%
copy from sysdeps/x86_64/fpu/multiarch/s_rintf.S
copy to sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S
index dee4ad7..7f47592 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_rintf.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S
@@ -16,22 +16,9 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
-
-
-ENTRY(__rintf)
-	.type	__rintf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__rintf_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__rintf_c(%rip), %rax
-2:	ret
-END(__rintf)
-weak_alias (__rintf, rintf)
-
+#include <sysdep.h>
 
+	.section .text.sse4.1,"ax",@progbits
 ENTRY(__rintf_sse41)
 	roundss	$4, %xmm0, %xmm0
 	ret
diff --git a/sysdeps/x86_64/fpu/multiarch/s_rintf.S b/sysdeps/x86_64/fpu/multiarch/s_rintf.c
similarity index 63%
rename from sysdeps/x86_64/fpu/multiarch/s_rintf.S
rename to sysdeps/x86_64/fpu/multiarch/s_rintf.c
index dee4ad7..88f3052 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_rintf.S
+++ b/sysdeps/x86_64/fpu/multiarch/s_rintf.c
@@ -1,6 +1,6 @@
-/* Copyright (C) 2011-2017 Free Software Foundation, Inc.
+/* Multiple versions of __rintf.
+   Copyright (C) 2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
-   Contributed by Ulrich Drepper <drepper@gmail.come>, 2011.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -16,23 +16,14 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-#include <machine/asm.h>
-#include <init-arch.h>
+#define rintf __redirect_rintf
+#define __rintf __redirect___rintf
+#include <math.h>
+#undef rintf
+#undef __rintf
 
+#define SYMBOL_NAME rintf
+#include "ifunc-sse4_1.h"
 
-ENTRY(__rintf)
-	.type	__rintf, @gnu_indirect_function
-	LOAD_RTLD_GLOBAL_RO_RDX
-	leaq	__rintf_sse41(%rip), %rax
-	HAS_CPU_FEATURE (SSE4_1)
-	jnz	2f
-	leaq	__rintf_c(%rip), %rax
-2:	ret
-END(__rintf)
+libc_ifunc_redirected (__redirect_rintf, __rintf, IFUNC_SELECTOR ());
 weak_alias (__rintf, rintf)
-
-
-ENTRY(__rintf_sse41)
-	roundss	$4, %xmm0, %xmm0
-	ret
-END(__rintf_sse41)

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog                                          |  289 ++++++++++++++++++++
 sysdeps/x86_64/fpu/multiarch/Makefile              |   36 +++-
 sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h  |   38 +++
 .../x86_64/fpu/multiarch/ifunc-mathvec-avx512.h    |   42 +++
 .../x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h    |   38 +++
 sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h        |   33 +++
 sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S       |   25 ++
 sysdeps/x86_64/fpu/multiarch/s_ceil.S              |   38 ---
 sysdeps/x86_64/fpu/multiarch/s_ceil.c              |   29 ++
 sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S      |   25 ++
 sysdeps/x86_64/fpu/multiarch/s_ceilf.S             |   38 ---
 sysdeps/x86_64/fpu/multiarch/s_ceilf.c             |   29 ++
 sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S      |   25 ++
 sysdeps/x86_64/fpu/multiarch/s_floor.S             |   38 ---
 sysdeps/x86_64/fpu/multiarch/s_floor.c             |   29 ++
 sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S     |   25 ++
 sysdeps/x86_64/fpu/multiarch/s_floorf.S            |   38 ---
 sysdeps/x86_64/fpu/multiarch/s_floorf.c            |   29 ++
 sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S  |   25 ++
 sysdeps/x86_64/fpu/multiarch/s_nearbyint.S         |   38 ---
 sysdeps/x86_64/fpu/multiarch/s_nearbyint.c         |   30 ++
 sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S |   25 ++
 sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S        |   38 ---
 sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c        |   30 ++
 sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S       |   25 ++
 sysdeps/x86_64/fpu/multiarch/s_rint.S              |   38 ---
 sysdeps/x86_64/fpu/multiarch/s_rint.c              |   29 ++
 sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S      |   25 ++
 sysdeps/x86_64/fpu/multiarch/s_rintf.S             |   38 ---
 sysdeps/x86_64/fpu/multiarch/s_rintf.c             |   29 ++
 .../x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_cos4_core-sse.S    |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S    |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_exp4_core-sse.S    |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S    |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_log2_core-sse2.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_log4_core-sse.S    |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_log8_core-avx2.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S    |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c    |   28 ++
 .../x86_64/fpu/multiarch/svml_d_pow4_core-sse.S    |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c    |   28 ++
 .../x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S    |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c    |   28 ++
 .../x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_sin4_core-sse.S    |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S    |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c    |   27 ++
 .../x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S   |   23 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S    |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c    |   27 ++
 .../fpu/multiarch/svml_d_sincos2_core-sse2.S       |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c |   28 ++
 .../x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c |   28 ++
 .../fpu/multiarch/svml_d_sincos8_core-avx2.S       |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c |   28 ++
 .../x86_64/fpu/multiarch/svml_s_cosf16_core-avx2.S |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S  |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.c  |   28 ++
 .../x86_64/fpu/multiarch/svml_s_cosf4_core-sse2.S  |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.c   |   28 ++
 .../x86_64/fpu/multiarch/svml_s_cosf8_core-sse.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.c   |   28 ++
 .../x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S |   23 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S  |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.c  |   28 ++
 .../x86_64/fpu/multiarch/svml_s_expf4_core-sse2.S  |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.c   |   28 ++
 .../x86_64/fpu/multiarch/svml_s_expf8_core-sse.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.c   |   28 ++
 .../x86_64/fpu/multiarch/svml_s_logf16_core-avx2.S |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S  |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.c  |   28 ++
 .../x86_64/fpu/multiarch/svml_s_logf4_core-sse2.S  |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.c   |   28 ++
 .../x86_64/fpu/multiarch/svml_s_logf8_core-sse.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.c   |   28 ++
 .../x86_64/fpu/multiarch/svml_s_powf16_core-avx2.S |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S  |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.c  |   28 ++
 .../x86_64/fpu/multiarch/svml_s_powf4_core-sse2.S  |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.c   |   28 ++
 .../x86_64/fpu/multiarch/svml_s_powf8_core-sse.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.c   |   28 ++
 .../fpu/multiarch/svml_s_sincosf16_core-avx2.S     |   20 ++
 .../x86_64/fpu/multiarch/svml_s_sincosf16_core.S   |   37 ---
 .../x86_64/fpu/multiarch/svml_s_sincosf16_core.c   |   28 ++
 .../fpu/multiarch/svml_s_sincosf4_core-sse2.S      |   20 ++
 .../x86_64/fpu/multiarch/svml_s_sincosf4_core.S    |   36 ---
 .../x86_64/fpu/multiarch/svml_s_sincosf4_core.c    |   28 ++
 .../fpu/multiarch/svml_s_sincosf8_core-sse.S       |   20 ++
 .../x86_64/fpu/multiarch/svml_s_sincosf8_core.S    |   36 ---
 .../x86_64/fpu/multiarch/svml_s_sincosf8_core.c    |   28 ++
 .../x86_64/fpu/multiarch/svml_s_sinf16_core-avx2.S |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S  |   37 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.c  |   28 ++
 .../x86_64/fpu/multiarch/svml_s_sinf4_core-sse2.S  |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.c   |   28 ++
 .../x86_64/fpu/multiarch/svml_s_sinf8_core-sse.S   |   20 ++
 sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S   |   36 ---
 sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.c   |   28 ++
 138 files changed, 2631 insertions(+), 1613 deletions(-)
 create mode 100644 sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h
 create mode 100644 sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h
 create mode 100644 sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h
 create mode 100644 sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_ceil-sse4_1.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/s_ceil.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_ceil.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_ceilf-sse4_1.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/s_ceilf.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_ceilf.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_floor-sse4_1.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/s_floor.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_floor.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_floorf-sse4_1.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/s_floorf.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_floorf.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_nearbyint-sse4_1.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/s_nearbyint.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_nearbyint.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_nearbyintf-sse4_1.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_nearbyintf.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_rint-sse4_1.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/s_rint.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_rint.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_rintf-sse4_1.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/s_rintf.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/s_rintf.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_log2_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_log4_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_log8_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core-avx2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core-sse2.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.c
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core-sse.S
 delete mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S
 create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.c


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