This is the mail archive of the glibc-cvs@sourceware.org mailing list for the glibc project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

GNU C Library master sources branch master updated. glibc-2.20-571-g06991eb


This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "GNU C Library master sources".

The branch, master has been updated
       via  06991eb816c935961584eeba121e8930c036372f (commit)
      from  df34134284b46cdd8ffd39551b858652d465ca08 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=06991eb816c935961584eeba121e8930c036372f

commit 06991eb816c935961584eeba121e8930c036372f
Author: Chris Metcalf <cmetcalf@ezchip.com>
Date:   Wed Jan 28 14:51:21 2015 -0500

    tilegx32: set __HAVE_64B_ATOMICS to 0
    
    This is because of alignment issues in the sem_t support.
    tilegx32 does in fact support 64-bit atomics and we will need
    to revisit this after the 2.21 freeze.

diff --git a/ChangeLog b/ChangeLog
index 1a7d519..508f519 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2015-01-28  Chris Metcalf  <cmetcalf@ezchip.com>
+
+	* sysdeps/tile/tilegx/bits/atomic.h [!_LP64] (__HAVE_64B_ATOMICS):
+	Define to 0.
+
 2015-01-28  Joseph Myers  <joseph@codesourcery.com>
 
 	* sysdeps/mips/bits/atomic.h [_MIPS_SIM == _ABIN32]
diff --git a/sysdeps/tile/tilegx/bits/atomic.h b/sysdeps/tile/tilegx/bits/atomic.h
index ac654b8..e75efb1 100644
--- a/sysdeps/tile/tilegx/bits/atomic.h
+++ b/sysdeps/tile/tilegx/bits/atomic.h
@@ -21,7 +21,15 @@
 
 #include <arch/spr_def.h>
 
-#define __HAVE_64B_ATOMICS 1
+#ifdef _LP64
+# define __HAVE_64B_ATOMICS 1
+#else
+/* tilegx32 does have 64-bit atomics, but assumptions in the semaphore
+   code mean that unaligned 64-bit atomics will be used if this symbol
+   is true, and unaligned atomics are not supported on tile.  */
+# define __HAVE_64B_ATOMICS 0
+#endif
+
 #define USE_ATOMIC_COMPILER_BUILTINS 0
 
 /* Pick appropriate 8- or 4-byte instruction. */

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog                         |    5 +++++
 sysdeps/tile/tilegx/bits/atomic.h |   10 +++++++++-
 2 files changed, 14 insertions(+), 1 deletions(-)


hooks/post-receive
-- 
GNU C Library master sources


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]