This is the mail archive of the
glibc-bugs@sourceware.org
mailing list for the glibc project.
[Bug math/15479] ceil, floor, round and trunc raise inexact exception
- From: "cvs-commit at gcc dot gnu.org" <sourceware-bugzilla at sourceware dot org>
- To: glibc-bugs at sourceware dot org
- Date: Thu, 04 Jan 2018 19:49:57 +0000
- Subject: [Bug math/15479] ceil, floor, round and trunc raise inexact exception
- Auto-submitted: auto-generated
- References: <bug-15479-131@http.sourceware.org/bugzilla/>
https://sourceware.org/bugzilla/show_bug.cgi?id=15479
--- Comment #11 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> ---
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "GNU C Library master sources".
The branch, master has been updated
via b0a4eca2fcfe2a6bc3cbb3951241c4facc887670 (commit)
via 4854ddd874d4aafb1ac21f551abda58ac4f9144d (commit)
from 8a5df95ffa83f525a4f638ead743f4fa2b7fe45a (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=b0a4eca2fcfe2a6bc3cbb3951241c4facc887670
commit b0a4eca2fcfe2a6bc3cbb3951241c4facc887670
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Wed Jan 3 17:03:48 2018 -0200
alpha: Remove s_trunc{f} implementation (BZ#22666)
As discussed in libc-alpha [1], alpha trunc{f} implementation uses
addt/suc and subt/suc and although the Alpha Architecture
Handbook version 3 states that that ADDx SUBx OUTPUT Exceptions
(B.3 Mapping to IEEE Standard) should not generate Inexact if INE
bit is set, the Alpha 21264 [2] chip manual (A.8 IEEE Floating-Point
Conformance) states that ADDx SUBx OUTPUT does generate inexact
exception for inexact result regardless.
As Joseph noted [3] to correctly fix it on alpha we need to either
avoid the instruction or avoid any inexact bit from it being set
on return from the function (while preserving the inexact bit that
might be set on the entry to the function). The later will result
mf_fpcr followed by a mt_fpcr to get and set the fpcr which will
defeat the optimization itself.
So the patch just remove the alpha optimized and rely on generic
implementation. It fixes the math/test-*-{trunc} on alpha.
[BZ #15479]
[BZ #22666]
* sysdeps/alpha/fpu/s_trunc.c: Remove file.
* sysdeps/alpha/fpu/s_truncf.c: Likewise.
[1] https://sourceware.org/ml/libc-alpha/2018-01/msg00114.html
[2] https://www.star.bnl.gov/public/daq/HARDWARE/21264_data_sheet.pdf
[3] https://sourceware.org/ml/libc-alpha/2018-01/msg00086.html
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=4854ddd874d4aafb1ac21f551abda58ac4f9144d
commit 4854ddd874d4aafb1ac21f551abda58ac4f9144d
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Wed Jan 3 15:36:53 2018 -0200
alpha: Remove s_ceil{f} and s_floor{f} implementation (BZ#22665)
As discussed in libc-alpha [1], alpha ceil{f} and floor{f}
implementation uses cvttq/svm and although the Alpha Architecture
Handbook version 3 states that that CVTfi OUTPUT Exceptions
(B.3 Mapping to IEEE Standard) should not generate Inexact if INE
bit is set on fpcr, the Alpha 21264 [1] chip manual (A.8 IEEE
Floating-Point Conformance) states that CVTfi and CVTif OUTPUT
does generate inexact exception for inexact result regardless.
As Joseph noted [2] to correctly fix it on alpha we need to either
avoid the instruction or avoid any inexact bit from it being set
on return from the function (while preserving the inexact bit that
might be set on the entry to the function). The later will result
mf_fpcr followed by a mt_fpcr to get and set the fpcr which will
defeat the optimization itself.
So the patch just remove the alpha optimized and rely on generic
implementation. It fixes the math/test-*-{ceil,floor} on alpha.
[BZ #15479]
[BZ #22665]
* sysdeps/alpha/fpu/s_ceil.c: Remove file.
* sysdeps/alpha/fpu/s_ceilf.c: Likewise.
* sysdeps/alpha/fpu/s_floor.c: Likewise.
* sysdeps/alpha/fpu/s_floorf.c: Likewise.
[1] https://www.star.bnl.gov/public/daq/HARDWARE/21264_data_sheet.pdf
[2] https://sourceware.org/ml/libc-alpha/2018-01/msg00086.html
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
-----------------------------------------------------------------------
Summary of changes:
ChangeLog | 14 ++++++++++
sysdeps/alpha/fpu/s_ceil.c | 50 --------------------------------------
sysdeps/alpha/fpu/s_ceilf.c | 54 -----------------------------------------
sysdeps/alpha/fpu/s_floor.c | 51 --------------------------------------
sysdeps/alpha/fpu/s_floorf.c | 55 ------------------------------------------
sysdeps/alpha/fpu/s_trunc.c | 45 ----------------------------------
sysdeps/alpha/fpu/s_truncf.c | 44 ---------------------------------
7 files changed, 14 insertions(+), 299 deletions(-)
delete mode 100644 sysdeps/alpha/fpu/s_ceil.c
delete mode 100644 sysdeps/alpha/fpu/s_ceilf.c
delete mode 100644 sysdeps/alpha/fpu/s_floor.c
delete mode 100644 sysdeps/alpha/fpu/s_floorf.c
delete mode 100644 sysdeps/alpha/fpu/s_trunc.c
delete mode 100644 sysdeps/alpha/fpu/s_truncf.c
--
You are receiving this mail because:
You are on the CC list for the bug.