This is the mail archive of the glibc-bugs@sourceware.org mailing list for the glibc project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug math/21955] Wrong .section .rodata.cst8 in sysdeps/x86_64/fpu/e_expf.S


https://sourceware.org/bugzilla/show_bug.cgi?id=21955

--- Comment #3 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> ---
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "GNU C Library master sources".

The branch, hjl/pr21955/master has been created
        at  25ccb7689da648a69a4da6957b6f62a09bcd5d76 (commit)

- Log -----------------------------------------------------------------
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=25ccb7689da648a69a4da6957b6f62a09bcd5d76

commit 25ccb7689da648a69a4da6957b6f62a09bcd5d76
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Aug 15 10:34:22 2017 -0700

    x86-64: Put L(SP_RANGE)/L(SP_INF_0) in .rodata.cst4 section [BZ #21955]

    sysdeps/x86_64/fpu/e_expf.S has

            lea     L(SP_RANGE)(%rip), %rdx /* load over/underflow bound */
            cmpl    (%rdx,%rax,4), %ecx     /* |x|<under/overflow bound ? */
    ...
            /* Here if |x| is Inf */
            lea     L(SP_INF_0)(%rip), %rdx /* depending on sign of x: */
            movss   (%rdx,%rax,4), %xmm0    /* return zero or Inf */
            ret
    ...
             .section .rodata.cst8,"aM",@progbits,8
    ...
            .p2align 2
    L(SP_RANGE): /* single precision overflow/underflow bounds */
            .long   0x42b17217      /* if x>this bound, then result overflows
*/
            .long   0x42cff1b4      /* if x<this bound, then result underflows
*/
            .type L(SP_RANGE), @object
            ASM_SIZE_DIRECTIVE(L(SP_RANGE))

            .p2align 2
    L(SP_INF_0):
            .long   0x7f800000      /* single precision Inf */
            .long   0               /* single precision zero */
            .type L(SP_INF_0), @object
            ASM_SIZE_DIRECTIVE(L(SP_INF_0))

    Since L(SP_RANGE) and L(SP_INF_0) are accessed as arrays of 4-byte
    elements, they should be placed in .rodata.cst4 section.

        [BZ #21955]
        * sysdeps/x86_64/fpu/e_expf.S (L(SP_RANGE)): Place it in
        .rodata.cst4 section.
        (L(SP_INF_0)): Likewise.

-----------------------------------------------------------------------

-- 
You are receiving this mail because:
You are on the CC list for the bug.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]