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RE: Tracepoint enhancements
> > [...] a checkpoint
> > represents a machine state. If there are multiple machines,
> > that complicates the picture -- but basically gdb is saying
> > to the target "I want to be able to return to the state that
> > you are in *right now*".
> Hmm, that is a significant wrinkle to the execution history theory.
> Basically it's not possible to know reliably whether the execution state
> of one CPU comes sooner or later than the state of another CPU - their
> clocks can't be guaranteed to be sync'ed to a sub-instruction level.
> It's a little like a distributed version control system, where each
> repository has its own version numbers, and any ordering derives from
> explicit push/pull instructions. Each inferior can have a reliable
> execution history, but if you want to go back to state X on CPU 1, you
> either just affect the one inferior, or expect that other inferiors will
> go back to the closest available state in their histories.
This is true on most physical hardware, but it can often be worked around in
simulators. So I would strongly suggest letting the backend worry about that.
In a system such as Simics and other complete simulation solutions, this is
indeed feasible since you impose a certain semantics on the execution of the
Or imagine connecting to a cycle-by-cycle simulation or emulation solution such
as a HAPS or Palladium or ZeBu system -- such solutions can stop synchronously
on a single cycle. Also, on-chip trace is coming out that would be able to do
synchronized time-stamping of event from an entire SoC, exported over some
hardware debug port.
So while not always true, there are several cases where you can indeed have a
synchronized history and control over parallellism. All you need is to insert a
layer of indirection that converts parallel to some kind of known sequential
Jakob Engblom, PhD, Technical Marketing Manager
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