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On Jan 22, 11:47pm, Piet/Pete Delaney wrote:
> > As noted above, there are a number of registers which are included in
> > the "g" packet which the IA-64 port disregards. r32-r127 are retrieved
> > using an offset from BSP from the backing store (i.e, from memory).
> > The predicate registers are transferred in a single 64 bit word (the
> > pr register) and are split out to show individual 1-bit registers
> > by gdb. Something similar occurs for the NaT bits. Most of these
> > are indicated via a -1 in the u_offsets array. (Some of these,
> > however, are simply not retrievable via the ptrace interface and
> > are therefore marked with -1.)
> In the kernel the registers may not always flushed out the the backing store.
> In a SPARC kernel a 2nd level trap is required for the kernel code to flush
> the registers to the backing store. A similar case may apply to ia64. Like
> in the even of a stack overflow (backing store isn't mapped).
On IA-64, I think you will find that it's going to be *very* difficult
for your debugging interface to learn the values of r32-r127 without
using the backing store.
> I would think it preferable for gdb to accept values in the 'g' packet
> and if it doesn't receive a copy of the r32-r127 registers to then try
> to fetch them using an offset from the BSP.
I'm willing to work with you to make this possible if you convince me that
it's worthwhile. (I.e, if you can show me how your stub is going to
obtain these values without using the backing store.)
> Isn't it possible to transfer predicate registers in the 'g' reply packet?
You can if you wish, but at the moment they'll be ignored.
> There isn't a 'pr' register defined in the ia64_register_names array,
> so the convention isn't clear.
Please look again. It's there. (It comes just before "ip".)
> If the REGISTER_RAW_SIZE macro indicates
> they are 1 byte or perhaps 1 bit each, then the transfer is possible.
They're eight bytes apiece. Why isn't the transfer possible with this
> The REGISTER_RAW_SIZE implies that the 'g' packet reply should provide
> the predict registers at 8 byte offsets like all of the other registers
> other than the floats.
You might also want to take a look at REGISTER_BYTE which'll give the
offsets more directly.
BTW, I think it might be worthwhile spending time working with the
maintainer of remote.c to make it possible to have a more abbreviated
"g" packet for IA-64 in which certain registers computed by either
means (r32-r127 from memory, p0-p63 from the bits of pr, etc) are