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[binutils-gdb] sim: or1k: add or1k target to sim
- From: sergiodj+buildbot at sergiodj dot net
- To: gdb-testers at sourceware dot org
- Date: Tue, 12 Dec 2017 14:51:48 -0500
- Subject: [binutils-gdb] sim: or1k: add or1k target to sim
- Authentication-results: sourceware.org; auth=none
*** TEST RESULTS FOR COMMIT fa8b7c2128cd03135b7d31ae2ecbc2d3273e990d ***
Author: Stafford Horne <shorne@gmail.com>
Branch: master
Commit: fa8b7c2128cd03135b7d31ae2ecbc2d3273e990d
sim: or1k: add or1k target to sim
This adds the OpenRISC 32-bit sim target. The OpenRISC sim is a CGEN
based sim so the bulk of the code is generated from the .cpu files by
CGEN. The engine decode and execute logic in mloop uses scache with
pseudo-basic-block extraction and supports both full and fast (switch)
modes.
The sim does not implement an mmu at the moment. The sim does implement
fpu instructions via the common sim-fpu implementation.
sim/ChangeLog:
2017-12-12 Stafford Horne <shorne@gmail.com>
Peter Gavin <pgavin@gmail.com>
* configure.tgt: Add or1k sim.
* or1k/README: New file.
* or1k/Makefile.in: New file.
* or1k/configure.ac: New file.
* or1k/mloop.in: New file.
* or1k/or1k-sim.h: New file.
* or1k/or1k.c: New file.
* or1k/sim-if.c: New file.
* or1k/sim-main.h: New file.
* or1k/traps.c: New file.