[Bug tdep/19401] AVR: gdb uses 2 byte breakpoints even for 4 byte insns which leads to illegal instruction

["s.pitchumani at gmail dot com" <sourceware-bugzilla at sourceware dot org>]

https://sourceware.org/bugzilla/show_bug.cgi?id=19401

--- Comment #5 from Pitchumani <s.pitchumani at gmail dot com> ---
(In reply to Mike Frysinger from comment #3)
> when the breakpoint is hit, the $pc is 0x14a, but that's the middle of the
> insn:
> (gdb) disassemble main
> Dump of assembler code for function main:
>    0x00000148 <+0>:     call    0x11a   ;  0x11a <bar>
>    0x0000014c <+4>:     call    0x132   ;  0x132 <foo>
> so when execution resumes, you get an invalid insn.

I guess this is because of the simulator who doesn't set resume PC properly
handle break insn. On break it suppose to set PC to point address where break
insn starts. It was broken by commit 9943d3185, which introduces
sim_engine_halt
to handle break. Since this function jumps to sim_resume using longjmp to 
sim_resume, code that sets PC (cpu->pc = ipc) is not executed.

Following patch may restore the behavior of setting PC on break. Not tested
yet.

diff --git a/sim/avr/interp.c b/sim/avrinterp.c
index 31a9940..fcce9b2 100644
--- a/sim/avr/interp.c
+++ b/sim/avr/interp.c
@@ -911,8 +911,7 @@ step_once (SIM_CPU *cpu)

       case OP_break:
    /* Stop on this address.  */  
-   sim_engine_halt (CPU_STATE (cpu), cpu, NULL, cpu->pc, sim_stopped,
SIM_SIGTRAP);
-   cpu->pc = ipc;
+   sim_engine_halt (CPU_STATE (cpu), cpu, NULL, ipc, sim_stopped,
SIM_SIGTRAP);
    break;

       case OP_bld:

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