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Re: [PATCH] aarch64 testsuite patch for ILP32


On 17-02-03 11:50:44, Steve Ellcey wrote:
> While working on aarch64 ILP32 support for gdb I ran into two tests that
> contain aarch64 inline assembly and that do not work when run in ILP32
> mode.  I would like to check in this patch even though the ILP32 support
> is not yet in gdb.  That way I can minimize the subsequent patch to support
> ILP32 mode.  This change also fixes a latent bug that is in aarch64-fp.c.
> The instructions that load q0 and q1 assume the address they want to use
> is in register x0 but the code does not gaurantee that.  It happens to
> work because we do not optimize the compilation and GCC uses x0 as a temporary
> register in the earlier statement but that is just sheer luck.  I have fixed
> this by adding a read argument to the load instructions to ensure they have
> the right value.

The bug fix part can go in now if you want to split it out this patch, but
ILP32 related part should go in with your ILP32 patch.

> 
> Tested in ILP32 and LP64 modes on aarch64.  OK to checkin?
> 
> Steve Ellcey
> sellcey@cavium.com
> 
> 
> 2017-02-03  Steve Ellcey  <sellcey@cavium.com>
> 
> 	* gdb.arch/aarch64-atomic-inst.c: Include stdint.h, use uint64_t
> 	instead of long for 64 bit types.
> 	* gdb.arch/aarch64-fp.c (main): Use %w0 instead of %x0 in 32
> 	bit mode.  Specify input register for ldr of q0 and q1.

Patch is OK, but should go in with your ILP32 patch.

-- 
Yao (齐尧)


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