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[PATCH 03/17] Fix spelling in comments in C source files (include)


include/ChangeLog:

	* ansidecl.h: Fix spelling in comments.
	* aout/aout64.h: Fix spelling in comments.
	* aout/encap.h: Fix spelling in comments.
	* aout/ranlib.h: Fix spelling in comments.
	* coff/internal.h: Fix spelling in comments.
	* coff/sym.h: Fix spelling in comments.
	* coff/xcoff.h: Fix spelling in comments.
	* elf/common.h: Fix spelling in comments.
	* elf/ia64.h: Fix spelling in comments.
	* elf/metag.h: Fix spelling in comments.
	* elf/nds32.h: Fix spelling in comments.
	* gdb/callback.h: Fix spelling in comments.
	* gdb/remote-sim.h: Fix spelling in comments.
	* mach-o/arm.h: Fix spelling in comments.
	* opcode/alpha.h: Fix spelling in comments.
	* opcode/arc.h: Fix spelling in comments.
	* opcode/hppa.h: Fix spelling in comments.
	* opcode/ppc.h: Fix spelling in comments.
	* opcode/tic4x.h: Fix spelling in comments.
	* opcode/tic6x-insn-formats.h: Fix spelling in comments.
	* opcode/tic80.h: Fix spelling in comments.
	* safe-ctype.h: Fix spelling in comments.
	* splay-tree.h: Fix spelling in comments.
---
 include/ansidecl.h                  |  2 +-
 include/aout/aout64.h               |  2 +-
 include/aout/encap.h                |  2 +-
 include/aout/ranlib.h               |  2 +-
 include/coff/internal.h             |  4 ++--
 include/coff/sym.h                  | 12 ++++++------
 include/coff/xcoff.h                |  4 ++--
 include/elf/common.h                | 18 +++++++++---------
 include/elf/ia64.h                  |  2 +-
 include/elf/metag.h                 |  2 +-
 include/elf/nds32.h                 |  2 +-
 include/gdb/callback.h              |  2 +-
 include/gdb/remote-sim.h            | 14 +++++++-------
 include/mach-o/arm.h                |  2 +-
 include/opcode/alpha.h              |  4 ++--
 include/opcode/arc.h                |  2 +-
 include/opcode/hppa.h               |  2 +-
 include/opcode/ppc.h                |  2 +-
 include/opcode/tic4x.h              | 10 +++++-----
 include/opcode/tic6x-insn-formats.h |  2 +-
 include/opcode/tic80.h              |  2 +-
 include/safe-ctype.h                |  2 +-
 include/splay-tree.h                |  2 +-
 23 files changed, 49 insertions(+), 49 deletions(-)

diff --git a/include/ansidecl.h b/include/ansidecl.h
index 0c71685..1b35752 100644
--- a/include/ansidecl.h
+++ b/include/ansidecl.h
@@ -1,4 +1,4 @@
-/* ANSI and traditional C compatability macros
+/* ANSI and traditional C compatibility macros
    Copyright (C) 1991-2016 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
diff --git a/include/aout/aout64.h b/include/aout/aout64.h
index 2aed5bd..4d93124 100644
--- a/include/aout/aout64.h
+++ b/include/aout/aout64.h
@@ -492,7 +492,7 @@ enum reloc_type
   RELOC_DISP14,			/* data[0:13] = addend - pc + sv 	*/
   /* Q .
      What are the other ones,
-     Since this is a clean slate, can we throw away the ones we dont
+     Since this is a clean slate, can we throw away the ones we don't
      understand ? Should we sort the values ? What about using a
      microcode format like the 68k ?  */
   NO_RELOC
diff --git a/include/aout/encap.h b/include/aout/encap.h
index 4962875..10afdbc 100644
--- a/include/aout/encap.h
+++ b/include/aout/encap.h
@@ -30,7 +30,7 @@
  * A normal bsd header (struct exec) is placed after the coff headers,
  * and before the real text.  I defined a the new fields 'a_machtype'
  * and a_flags.  If a_machtype is M_386, and a_flags & A_ENCAP is
- * true, then the bsd header is preceeded by a coff header.  Macros
+ * true, then the bsd header is preceded by a coff header.  Macros
  * like N_TXTOFF and N_TXTADDR use this field to find the bsd header.
  * 
  * The only problem is to track down the bsd exec header.  The
diff --git a/include/aout/ranlib.h b/include/aout/ranlib.h
index 8aab973..c1b20b6 100644
--- a/include/aout/ranlib.h
+++ b/include/aout/ranlib.h
@@ -54,7 +54,7 @@ struct symdef
     unsigned long file_offset;
   };
 
-/* Compatability with BSD code */
+/* Compatibility with BSD code */
 
 #define	ranlib	symdef
 #define	ran_un	s
diff --git a/include/coff/internal.h b/include/coff/internal.h
index 885ac16..fe0f3f6 100644
--- a/include/coff/internal.h
+++ b/include/coff/internal.h
@@ -67,7 +67,7 @@ struct internal_filehdr
   /* coff-stgo32 EXE stub header before BFD tdata has been allocated.
      Its data is kept in INTERNAL_FILEHDR.GO32STUB afterwards.
 
-     F_GO32STUB is set iff go32stub contains a valid data.  Artifical headers
+     F_GO32STUB is set iff go32stub contains a valid data.  Artificial headers
      created in BFD have no pre-set go32stub.  */
   char go32stub[GO32_STUBSIZE];
 
@@ -390,7 +390,7 @@ struct internal_aouthdr
 #define C_THUMBEXTFUNC  (C_THUMBEXT  + 20)	/* 150 */
 #define C_THUMBSTATFUNC (C_THUMBSTAT + 20)	/* 151 */
 
-/* True if XCOFF symbols of class CLASS have auxillary csect information.  */
+/* True if XCOFF symbols of class CLASS have auxiliary csect information.  */
 #define CSECT_SYM_P(CLASS) \
   ((CLASS) == C_EXT || (CLASS) == C_AIX_WEAKEXT || (CLASS) == C_HIDEXT)
 
diff --git a/include/coff/sym.h b/include/coff/sym.h
index 76204af..8441401 100644
--- a/include/coff/sym.h
+++ b/include/coff/sym.h
@@ -76,8 +76,8 @@ typedef struct {
 	bfd_vma	cbSymOffset;	/* offset to start of local symbols*/
 	long	ioptMax;	/* max index into optimization symbol entries */
 	bfd_vma	cbOptOffset;	/* offset to optimization symbol entries */
-	long	iauxMax;	/* number of auxillary symbol entries */
-	bfd_vma	cbAuxOffset;	/* offset to start of auxillary symbol entries*/
+	long	iauxMax;	/* number of auxiliary symbol entries */
+	bfd_vma	cbAuxOffset;	/* offset to start of auxiliary symbol entries*/
 	long	issMax;		/* max index into local strings */
 	bfd_vma	cbSsOffset;	/* offset to start of local strings */
 	long	issExtMax;	/* max index into external strings */
@@ -315,7 +315,7 @@ typedef struct {
 
 
 /*
- * Auxillary information occurs only if needed.
+ * Auxiliary information occurs only if needed.
  * It ALWAYS occurs in this order when present.
 
 	    isymMac		used by stProc only
@@ -369,7 +369,7 @@ typedef struct {
 	unsigned ot: 8;		/* optimization type */
 	unsigned value: 24;	/* address where we are moving it to */
 	RNDXR	rndx;		/* points to a symbol or opt entry */
-	unsigned long	offset;	/* relative offset this occured */
+	unsigned long	offset;	/* relative offset this occurred */
 	} OPTR, *pOPTR;
 #define optNil	((pOPTR) 0)
 #define cbOPTR sizeof(OPTR)
@@ -419,10 +419,10 @@ typedef long FIT, *pFIT;
 /* Dense numbers
  *
  * Rather than use file index, symbol index pairs to represent symbols
- *	and globals, we use dense number so that they can be easily embeded
+ *	and globals, we use dense number so that they can be easily embedded
  *	in intermediate code and the programs that process them can
  *	use direct access tabls instead of hash table (which would be
- *	necesary otherwise because of the sparse name space caused by
+ *	necessary otherwise because of the sparse name space caused by
  *	file index, symbol index pairs. Dense number are represented
  *	by RNDXRs.
  */
diff --git a/include/coff/xcoff.h b/include/coff/xcoff.h
index 4dde058..9f4bead 100644
--- a/include/coff/xcoff.h
+++ b/include/coff/xcoff.h
@@ -68,7 +68,7 @@
 #define STYP_LOADER 0x1000
 
 /* Specifies an exception section.  A section of this type provides 
-   information to identify the reason that a trap or ececptin occured within 
+   information to identify the reason that a trap or exception occurred within
    and executable object program */
 #define STYP_EXCEPT 0x0100
 
@@ -137,7 +137,7 @@
 /* Dwarf symbol.  */
 #define C_DWARF		112
 
-/* Auxillary Symbol Entries  */
+/* Auxiliary Symbol Entries  */
 
 /* x_smtyp values:  */
 #define	SMTYP_ALIGN(x)	((x) >> 3)	/* log2 of alignment */
diff --git a/include/elf/common.h b/include/elf/common.h
index da79613..8b52d4d 100644
--- a/include/elf/common.h
+++ b/include/elf/common.h
@@ -357,19 +357,19 @@
 /* Old, unofficial value for National Semiconductor CompactRISC - CR16 */
 #define EM_CR16_OLD		115
 
-/* AVR magic number.  Written in the absense of an ABI.  */
+/* AVR magic number.  Written in the absence of an ABI.  */
 #define EM_AVR_OLD		0x1057
 
-/* MSP430 magic number.  Written in the absense of everything.  */
+/* MSP430 magic number.  Written in the absence of everything.  */
 #define EM_MSP430_OLD		0x1059
 
-/* Morpho MT.   Written in the absense of an ABI.  */
+/* Morpho MT.   Written in the absence of an ABI.  */
 #define EM_MT			0x2530
 
 /* FR30 magic number - no EABI available.  */
 #define EM_CYGNUS_FR30		0x3330
 
-/* DLX magic number.  Written in the absense of an ABI.  */
+/* DLX magic number.  Written in the absence of an ABI.  */
 #define EM_DLX			0x5aa5
 
 /* FRV magic number - no EABI available??.  */
@@ -384,7 +384,7 @@
 /* D30V backend magic number.  Written in the absence of an ABI.  */
 #define EM_CYGNUS_D30V		0x7676
 
-/* Ubicom IP2xxx;   Written in the absense of an ABI.  */
+/* Ubicom IP2xxx;   Written in the absence of an ABI.  */
 #define EM_IP2K_OLD		0x8217
 
 /* Cygnus PowerPC ELF backend.  Written in the absence of an ABI.  */
@@ -396,7 +396,7 @@
 /* Cygnus M32R ELF backend.  Written in the absence of an ABI.  */
 #define EM_CYGNUS_M32R		0x9041
 
-/* V850 backend magic number.  Written in the absense of an ABI.  */
+/* V850 backend magic number.  Written in the absence of an ABI.  */
 #define EM_CYGNUS_V850		0x9080
 
 /* old S/390 backend magic number. Written in the absence of an ABI.  */
@@ -408,7 +408,7 @@
 #define EM_XSTORMY16		0xad45
 
 /* mn10200 and mn10300 backend magic numbers.
-   Written in the absense of an ABI.  */
+   Written in the absence of an ABI.  */
 #define EM_CYGNUS_MN10300	0xbeef
 #define EM_CYGNUS_MN10200	0xdead
 
@@ -494,7 +494,7 @@
 #define SHT_FINI_ARRAY	  15		/* Array of ptrs to finish functions */
 #define SHT_PREINIT_ARRAY 16		/* Array of ptrs to pre-init funcs */
 #define SHT_GROUP	  17		/* Section contains a section group */
-#define SHT_SYMTAB_SHNDX  18		/* Indicies for SHN_XINDEX entries */
+#define SHT_SYMTAB_SHNDX  18		/* Indices for SHN_XINDEX entries */
 
 #define SHT_LOOS	0x60000000	/* First of OS specific semantics */
 #define SHT_HIOS	0x6fffffff	/* Last of OS specific semantics */
@@ -816,7 +816,7 @@
    DT_VALRNGHI) and virtual address range (DT_ADDRRNGLO to DT_ADDRRNGHI),
    are used on Solaris.  We support them everywhere.  Note these values
    lie outside of the (new) range for OS specific values.  This is a
-   deliberate special case and we maintain it for backwards compatability.
+   deliberate special case and we maintain it for backwards compatibility.
  */
 #define DT_VALRNGLO	0x6ffffd00
 #define DT_GNU_PRELINKED 0x6ffffdf5
diff --git a/include/elf/ia64.h b/include/elf/ia64.h
index 6b410a3..edc294c 100644
--- a/include/elf/ia64.h
+++ b/include/elf/ia64.h
@@ -102,7 +102,7 @@
 /* The section contains the dwarf-3 string table.  */
 #define SHT_IA_64_VMS_DEBUG_STR         0x60000003
 /* The section contains linkage information to perform consistency checking
-   accross object modules.  */
+   across object modules.  */
 #define SHT_IA_64_VMS_LINKAGES          0x60000004
 /* The section allows the symbol vector in an image to be location through
    the section table.  */
diff --git a/include/elf/metag.h b/include/elf/metag.h
index 8787f7f..7bc4d0e 100644
--- a/include/elf/metag.h
+++ b/include/elf/metag.h
@@ -33,7 +33,7 @@ START_RELOC_NUMBERS (elf_metag_reloc_type)
      RELOC_NUMBER (R_METAG_RELBRANCH,     4)
      RELOC_NUMBER (R_METAG_GETSETOFF,     5)
 
-     /* Backward compatability */
+     /* Backward compatibility */
      RELOC_NUMBER (R_METAG_REG32OP1,      6)
      RELOC_NUMBER (R_METAG_REG32OP2,      7)
      RELOC_NUMBER (R_METAG_REG32OP3,      8)
diff --git a/include/elf/nds32.h b/include/elf/nds32.h
index 7279ca0..02d862e 100644
--- a/include/elf/nds32.h
+++ b/include/elf/nds32.h
@@ -242,7 +242,7 @@ END_RELOC_NUMBERS (R_NDS32_max)
 #define E_NDS32_HAS_SATURATION_INST		0x00020000 /* v3, ELF 1.4.  */
 /* Encription instructions.  */
 #define E_NDS32_HAS_ENCRIPT_INST		0x00040000
-/* Doulbe Precision Floating point processor instructions.  */
+/* Double Precision Floating point processor instructions.  */
 #define E_NDS32_HAS_FPU_DP_INST			0x00080000
 /* No MAC instruction used.  */
 #define E_NDS32_HAS_NO_MAC_INST			0x00100000 /* Reclaimed when V2/V3.  */
diff --git a/include/gdb/callback.h b/include/gdb/callback.h
index 9459129..b036e4f 100644
--- a/include/gdb/callback.h
+++ b/include/gdb/callback.h
@@ -103,7 +103,7 @@ struct host_callback_struct
      non-empty.  */
   void (*pipe_nonempty) (host_callback *, int read_fd, int write_fd);
 
-  /* When present, call to the client to give it the oportunity to
+  /* When present, call to the client to give it the opportunity to
      poll any io devices for a request to quit (indicated by a nonzero
      return value). */
   int (*poll_quit) (host_callback *);
diff --git a/include/gdb/remote-sim.h b/include/gdb/remote-sim.h
index fc12898..addf400 100644
--- a/include/gdb/remote-sim.h
+++ b/include/gdb/remote-sim.h
@@ -108,7 +108,7 @@ SIM_DESC sim_open (SIM_OPEN_KIND kind, struct host_callback_struct *callback,
 		   struct bfd *abfd, char * const *argv);
 
 
-/* Destory a simulator instance.
+/* Destroy a simulator instance.
 
    QUITTING is non-zero if we cannot hang on errors.
 
@@ -139,7 +139,7 @@ void sim_close (SIM_DESC sd, int quitting);
 
    FIXME: For some hardware targets, before a loaded program can be
    executed, it requires the manipulation of VM registers and tables.
-   Such manipulation should probably (?) occure in
+   Such manipulation should probably (?) occur in
    sim_create_inferior. */
 
 SIM_RC sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty);
@@ -153,7 +153,7 @@ SIM_RC sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty);
    Hardware simulator: This function shall initialize the processor
    registers to a known value.  The program counter and possibly stack
    pointer shall be set using information obtained from ABFD (or
-   hardware reset defaults).  ARGV and ENV, dependant on the target
+   hardware reset defaults).  ARGV and ENV, dependent on the target
    ABI, may be written to memory.
 
    Process simulator: After a call to this function, a new process
@@ -186,7 +186,7 @@ int sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length);
 
    Legacy implementations ignore LENGTH and always return -1.
 
-   If LENGTH does not match the size of REGNO no data is transfered
+   If LENGTH does not match the size of REGNO no data is transferred
    (the actual register size is still returned). */
 
 int sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length);
@@ -228,7 +228,7 @@ void sim_info (SIM_DESC sd, int verbose);
    indicated by that signal.  If a value of zero is passed in then the
    simulation will continue as if there were no outstanding signal.
    The effect of any other SIGGNAL value is is implementation
-   dependant.
+   dependent.
 
    Process simulator: If SIGRC is non-zero then the corresponding
    signal is delivered to the simulated program and execution is then
@@ -248,7 +248,7 @@ int sim_stop (SIM_DESC sd);
 /* Fetch the REASON why the program stopped.
 
    SIM_EXITED: The program has terminated. SIGRC indicates the target
-   dependant exit status.
+   dependent exit status.
 
    SIM_STOPPED: The program has stopped.  SIGRC uses the host's signal
    numbering as a way of identifying the reaon: program interrupted by
@@ -258,7 +258,7 @@ int sim_stop (SIM_DESC sd);
    undefined memory region (SIGSEGV); Mis-aligned memory access
    (SIGBUS).  For some signals information in addition to the signal
    number may be retained by the simulator (e.g. offending address),
-   that information is not directly accessable via this interface.
+   that information is not directly accessible via this interface.
 
    SIM_SIGNALLED: The program has been terminated by a signal. The
    simulator has encountered target code that causes the the program
diff --git a/include/mach-o/arm.h b/include/mach-o/arm.h
index 39f9214..26f2930 100644
--- a/include/mach-o/arm.h
+++ b/include/mach-o/arm.h
@@ -24,7 +24,7 @@
 /* ARM relocations.  */
 #define BFD_MACH_O_ARM_RELOC_VANILLA   0 /* Generic relocation.  */
 #define BFD_MACH_O_ARM_RELOC_PAIR      1 /* Second entry in a pair.  */
-#define BFD_MACH_O_ARM_RELOC_SECTDIFF  2 /* Substract with a PAIR.  */
+#define BFD_MACH_O_ARM_RELOC_SECTDIFF  2 /* Subtract with a PAIR.  */
 #define BFD_MACH_O_ARM_RELOC_LOCAL_SECTDIFF 3 /* Like above, but local ref.  */
 #define BFD_MACH_O_ARM_RELOC_PB_LA_PTR 4 /* Prebound lazy pointer.  */
 #define BFD_MACH_O_ARM_RELOC_BR24      5 /* 24bit branch.  */
diff --git a/include/opcode/alpha.h b/include/opcode/alpha.h
index 747660e..a0cee82 100644
--- a/include/opcode/alpha.h
+++ b/include/opcode/alpha.h
@@ -158,7 +158,7 @@ extern const unsigned alpha_num_operands;
    instructions which want their operands to look like "Ra,disp(Rb)".  */
 #define AXP_OPERAND_PARENS	02
 
-/* Used in combination with PARENS, this supresses the supression of
+/* Used in combination with PARENS, this suppresses the supression of
    the comma.  This is used for "jmp Ra,(Rb),hint".  */
 #define AXP_OPERAND_COMMA	04
 
@@ -179,7 +179,7 @@ extern const unsigned alpha_num_operands;
    a flags value of 0 can be treated as end-of-arguments.  */
 #define AXP_OPERAND_UNSIGNED	0200
 
-/* Supress overflow detection on this field.  This is used for hints. */
+/* Suppress overflow detection on this field.  This is used for hints. */
 #define AXP_OPERAND_NOOVERFLOW	0400
 
 /* Mask for optional argument default value.  */
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index 2214b2f..954746a 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -317,7 +317,7 @@ extern const unsigned arc_NToperand;
 /* Don't check the range when matching.	 */
 #define ARC_OPERAND_NCHK	0x0800
 
-/* Mark the braket possition.  */
+/* Mark the braket position.  */
 #define ARC_OPERAND_BRAKET      0x1000
 
 /* Address type operand for NPS400.  */
diff --git a/include/opcode/hppa.h b/include/opcode/hppa.h
index 2dcc8bc..6d686da 100644
--- a/include/opcode/hppa.h
+++ b/include/opcode/hppa.h
@@ -30,7 +30,7 @@
  */
 
 /* There are two kinds of delay slot nullification: normal which is
- * controled by the nullification bit, and conditional, which depends
+ * controlled by the nullification bit, and conditional, which depends
  * on the direction of the branch and its success or failure.
  *
  * NONE is unfortunately #defined in the hiux system include files.  
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index a9dc50d..5ca53ae 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -405,7 +405,7 @@ extern const unsigned int num_powerpc_operands;
 
 /* This flag is only used with PPC_OPERAND_OPTIONAL.  If this operand
    is omitted, then the value it should use for the operand is stored
-   in the SHIFT field of the immediatly following operand field.  */
+   in the SHIFT field of the immediately following operand field.  */
 #define PPC_OPERAND_OPTIONAL_VALUE (0x400000)
 
 /* This flag is only used with PPC_OPERAND_OPTIONAL.  The operand is
diff --git a/include/opcode/tic4x.h b/include/opcode/tic4x.h
index b4209a1..1287699 100644
--- a/include/opcode/tic4x.h
+++ b/include/opcode/tic4x.h
@@ -519,7 +519,7 @@ typedef struct tic4x_inst tic4x_inst_t;
    Instr: 1/1 - CALLc, C4X: LAJc
 */
 
-/* LL: Load-load parallell operation
+/* LL: Load-load parallel operation
    Syntax: <i> src2, dst2 || <i> src1, dst1
        src1 = Indirect 0,1,IR0,IR1 (J)
        dst1 = Register 0-7 (K)
@@ -533,7 +533,7 @@ typedef struct tic4x_inst tic4x_inst_t;
   { name "2_" name "1", opcode, 0xfe000000, "i;L|J,K", level }, \
   { name "1_" name "2", opcode, 0xfe000000, "J,K|i;L", level }
 
-/* LS: Store-store parallell operation
+/* LS: Store-store parallel operation
    Syntax: <i> src2, dst2 || <i> src1, dst1
        src1 = Register 0-7 (H)
        dst1 = Indirect 0,1,IR0,IR1 (J)
@@ -613,7 +613,7 @@ typedef struct tic4x_inst tic4x_inst_t;
   { nameb "3_" namea "3", opcode|0x03000000, 0xff000000, "i;H;M|j;K;N", level }, \
   { nameb "3_" namea "3", opcode|0x03000000, 0xff000000, "i;H;M|K;j;N", level }
 
-/* P: General 2-operand operation with parallell store
+/* P: General 2-operand operation with parallel store
    Syntax: <ia> src2, dst1 || <ib> src3, dst2
        src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
        dst1 = Register 0-7 (L)
@@ -628,7 +628,7 @@ typedef struct tic4x_inst tic4x_inst_t;
   { namea "_" nameb, opcode, 0xfe000000, "i;L|H,J", level }, \
   { nameb "_" namea, opcode, 0xfe000000, "H,J|i;L", level }
 
-/* Q: General 3-operand operation with parallell store
+/* Q: General 3-operand operation with parallel store
    Syntax: <ia> src1, src2, dst1 || <ib> src3, dst2
        src1 = Register 0-7 (K)
        src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
@@ -644,7 +644,7 @@ typedef struct tic4x_inst tic4x_inst_t;
   { namea "3_" nameb    , opcode, 0xfe000000, "K,i;L|H,J", level }, \
   { nameb "_"  namea "3", opcode, 0xfe000000, "H,J|K,i;L", level }
 
-/* QC: General commutative 3-operand operation with parallell store
+/* QC: General commutative 3-operand operation with parallel store
    Syntax: <ia> src2, src1, dst1 || <ib> src3, dst2
            <ia> src1, src2, dst1 || <ib> src3, dst2 - Manual
        src1 = Register 0-7 (K)
diff --git a/include/opcode/tic6x-insn-formats.h b/include/opcode/tic6x-insn-formats.h
index f93142f..9db8e0a 100644
--- a/include/opcode/tic6x-insn-formats.h
+++ b/include/opcode/tic6x-insn-formats.h
@@ -552,7 +552,7 @@ FMT(nfu_uspl, 16, 0x0c66, 0xbc7e,
 /* make up some fields to pretend to have s and z fields s for this format
    so as to fit in other predicated compact instruction to avoid special-
    casing this instruction in tic6x-dis.c 
-   use op field as a predicate adress register selector (s field)
+   use op field as a predicate address register selector (s field)
    use the first zeroed bit as a z value as this insn only supports [a0]
    and [b0] predicate forms.
 */
diff --git a/include/opcode/tic80.h b/include/opcode/tic80.h
index 510da05..a8b13b3 100644
--- a/include/opcode/tic80.h
+++ b/include/opcode/tic80.h
@@ -169,7 +169,7 @@ extern const struct tic80_operand tic80_operands[];
 
 #define TIC80_OPERAND_PCREL	(1 << 5)
 
-/* This flag is a hint to the disassembler for using hex as the prefered
+/* This flag is a hint to the disassembler for using hex as the preferred
    printing format, even for small positive or negative immediate values.
    Normally values in the range -999 to 999 are printed as signed decimal
    values and other values are printed in hex. */
diff --git a/include/safe-ctype.h b/include/safe-ctype.h
index a1118be..5aaf0f3 100644
--- a/include/safe-ctype.h
+++ b/include/safe-ctype.h
@@ -112,7 +112,7 @@ extern const unsigned char  _sch_tolower[256];
 #define TOUPPER(c) _sch_toupper[(c) & 0xff]
 #define TOLOWER(c) _sch_tolower[(c) & 0xff]
 
-/* Prevent the users of safe-ctype.h from accidently using the routines
+/* Prevent the users of safe-ctype.h from accidentally using the routines
    from ctype.h.  Initially, the approach was to produce an error when
    detecting that ctype.h has been included.  But this was causing
    trouble as ctype.h might get indirectly included as a result of
diff --git a/include/splay-tree.h b/include/splay-tree.h
index 0eef3fa..6cf639b 100644
--- a/include/splay-tree.h
+++ b/include/splay-tree.h
@@ -98,7 +98,7 @@ struct splay_tree_s {
   /* The root of the tree.  */
   splay_tree_node root;
 
-  /* The comparision function.  */
+  /* The comparison function.  */
   splay_tree_compare_fn comp;
 
   /* The deallocate-key function.  NULL if no cleanup is necessary.  */
-- 
2.7.4


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