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[PATCH, moxie, sim] moxie ldo/sto instructions use 16 bit offsets
- From: Anthony Green <green at moxielogic dot com>
- To: gdb-patches at sourceware dot org
- Date: Sat, 27 Dec 2014 18:20:21 -0500
- Subject: [PATCH, moxie, sim] moxie ldo/sto instructions use 16 bit offsets
- Authentication-results: sourceware.org; auth=none
This patch, which I have committed, introduces support for a recent ISA
change in Moxie. The ldo and sto instructions now use a 16 bit offset
instead of a 32 bit offset. The binutils and GCC changes have already
been checked in. Moxie implementations (cores and other sims) are in
the process of being updated.
AG
2014-12-27 Anthony Green <green@moxielogic.com>
* interp.c (EXTRACT_OFFSET): Define.
(sim_resume): ldo/sto instructions now use 16 bit offset instead
of 32. Also swap mul.x/umul.x opcodes (reversed by mistake).
diff --git a/sim/moxie/interp.c b/sim/moxie/interp.c
index 6a72e41..4dbb1dd 100644
--- a/sim/moxie/interp.c
+++ b/sim/moxie/interp.c
@@ -50,6 +50,12 @@ FILE *tracefile;
+ (sim_core_read_aligned_1 (scpu, cia, read_map, addr+2) << 8) \
+ (sim_core_read_aligned_1 (scpu, cia, read_map, addr+3)))
+#define EXTRACT_OFFSET(addr) \
+ (unsigned int) \
+ (((signed short) \
+ ((sim_core_read_aligned_1 (scpu, cia, read_map, addr) << 8) \
+ + (sim_core_read_aligned_1 (scpu, cia, read_map, addr+1))) << 16) >> 16)
+
unsigned long
moxie_extract_unsigned_integer (addr, len)
unsigned char * addr;
@@ -555,26 +561,26 @@ sim_resume (sd, step, siggnal)
break;
case 0x0c: /* ldo.l */
{
- unsigned int addr = EXTRACT_WORD(pc+2);
+ unsigned int addr = EXTRACT_OFFSET(pc+2);
int a = (inst >> 4) & 0xf;
int b = inst & 0xf;
TRACE("ldo.l");
addr += cpu.asregs.regs[b];
cpu.asregs.regs[a] = rlat (scpu, opc, addr);
- pc += 4;
+ pc += 2;
}
break;
case 0x0d: /* sto.l */
{
- unsigned int addr = EXTRACT_WORD(pc+2);
+ unsigned int addr = EXTRACT_OFFSET(pc+2);
int a = (inst >> 4) & 0xf;
int b = inst & 0xf;
TRACE("sto.l");
addr += cpu.asregs.regs[a];
wlat (scpu, opc, addr, cpu.asregs.regs[b]);
- pc += 4;
+ pc += 2;
}
break;
case 0x0e: /* cmp */
@@ -641,29 +647,29 @@ sim_resume (sd, step, siggnal)
cpu.asregs.regs[a] = (int) bv & 0xffff;
}
break;
- case 0x14: /* mul.x */
+ case 0x14: /* umul.x */
{
int a = (inst >> 4) & 0xf;
int b = inst & 0xf;
unsigned av = cpu.asregs.regs[a];
unsigned bv = cpu.asregs.regs[b];
- signed long long r =
- (signed long long) av * (signed long long) bv;
+ unsigned long long r =
+ (unsigned long long) av * (unsigned long long) bv;
- TRACE("mul.x");
+ TRACE("umul.x");
cpu.asregs.regs[a] = r >> 32;
}
break;
- case 0x15: /* umul.x */
+ case 0x15: /* mul.x */
{
int a = (inst >> 4) & 0xf;
int b = inst & 0xf;
unsigned av = cpu.asregs.regs[a];
unsigned bv = cpu.asregs.regs[b];
- unsigned long long r =
- (unsigned long long) av * (unsigned long long) bv;
+ signed long long r =
+ (signed long long) av * (signed long long) bv;
- TRACE("umul.x");
+ TRACE("mul.x");
cpu.asregs.regs[a] = r >> 32;
}
break;
@@ -1057,50 +1063,50 @@ sim_resume (sd, step, siggnal)
break;
case 0x36: /* ldo.b */
{
- unsigned int addr = EXTRACT_WORD(pc+2);
+ unsigned int addr = EXTRACT_OFFSET(pc+2);
int a = (inst >> 4) & 0xf;
int b = inst & 0xf;
TRACE("ldo.b");
addr += cpu.asregs.regs[b];
cpu.asregs.regs[a] = rbat (scpu, opc, addr);
- pc += 4;
+ pc += 2;
}
break;
case 0x37: /* sto.b */
{
- unsigned int addr = EXTRACT_WORD(pc+2);
+ unsigned int addr = EXTRACT_OFFSET(pc+2);
int a = (inst >> 4) & 0xf;
int b = inst & 0xf;
TRACE("sto.b");
addr += cpu.asregs.regs[a];
wbat (scpu, opc, addr, cpu.asregs.regs[b]);
- pc += 4;
+ pc += 2;
}
break;
case 0x38: /* ldo.s */
{
- unsigned int addr = EXTRACT_WORD(pc+2);
+ unsigned int addr = EXTRACT_OFFSET(pc+2);
int a = (inst >> 4) & 0xf;
int b = inst & 0xf;
TRACE("ldo.s");
addr += cpu.asregs.regs[b];
cpu.asregs.regs[a] = rsat (scpu, opc, addr);
- pc += 4;
+ pc += 2;
}
break;
case 0x39: /* sto.s */
{
- unsigned int addr = EXTRACT_WORD(pc+2);
+ unsigned int addr = EXTRACT_OFFSET(pc+2);
int a = (inst >> 4) & 0xf;
int b = inst & 0xf;
TRACE("sto.s");
addr += cpu.asregs.regs[a];
wsat (scpu, opc, addr, cpu.asregs.regs[b]);
- pc += 4;
+ pc += 2;
}
break;
default: