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Re: [PATCH 1/4] Restrict matching add/sub sp, #imm
- From: Yao Qi <yao at codesourcery dot com>
- To: Will Newton <will dot newton at linaro dot org>
- Cc: "gdb-patches at sourceware dot org" <gdb-patches at sourceware dot org>
- Date: Mon, 7 Jul 2014 09:37:06 +0800
- Subject: Re: [PATCH 1/4] Restrict matching add/sub sp, #imm
- Authentication-results: sourceware.org; auth=none
- References: <1404367792-23234-1-git-send-email-yao at codesourcery dot com> <1404367792-23234-2-git-send-email-yao at codesourcery dot com> <CANu=DmiOm27eXhYHo4CBZrE7Yx+MjmFajrky8MwLS5fRa+wpjA at mail dot gmail dot com>
On 07/03/2014 04:31 PM, Will Newton wrote:
> One too many ms?
>
Oh, sorry.
>> > (thumb_in_function_epilogue_p): Don't match 'sub sp, #imm'.
>> > ---
>> > gdb/arm-tdep.c | 15 +++++----------
>> > 1 file changed, 5 insertions(+), 10 deletions(-)
>> >
>> > diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
>> > index 8cc60a4..0fc7fc1 100644
>> > --- a/gdb/arm-tdep.c
>> > +++ b/gdb/arm-tdep.c
>> > @@ -737,16 +737,11 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
>> > pv_area_store (stack, regs[ARM_SP_REGNUM], 4, regs[regno]);
>> > }
>> > }
>> > - else if ((insn & 0xff00) == 0xb000) /* add sp, #simm OR
>> > - sub sp, #simm */
>> > + else if ((insn & 0xff80) == 0xb080) /* sub sp, #simm */
> I wonder if we should adjust the comment to just #imm, as #simm
> implies it is a signed quantity.
>
Fixed.
--
Yao (éå)
gdb:
2014-07-07 Yao Qi <yao@codesourcery.com>
* arm-tdep.c (thumb_analyze_prologue): Don't match instruction
'add sp, #imm'.
(thumb_in_function_epilogue_p): Don't match 'sub sp, #imm'.
---
gdb/arm-tdep.c | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 8cc60a4..6b1cf3c 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -737,16 +737,11 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
pv_area_store (stack, regs[ARM_SP_REGNUM], 4, regs[regno]);
}
}
- else if ((insn & 0xff00) == 0xb000) /* add sp, #simm OR
- sub sp, #simm */
+ else if ((insn & 0xff80) == 0xb080) /* sub sp, #imm */
{
offset = (insn & 0x7f) << 2; /* get scaled offset */
- if (insn & 0x80) /* Check for SUB. */
- regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM],
- -offset);
- else
- regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM],
- offset);
+ regs[ARM_SP_REGNUM] = pv_add_constant (regs[ARM_SP_REGNUM],
+ -offset);
}
else if ((insn & 0xf800) == 0xa800) /* add Rd, sp, #imm */
regs[bits (insn, 8, 10)] = pv_add_constant (regs[ARM_SP_REGNUM],
@@ -3264,7 +3259,7 @@ thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
found_return = 1;
else if (insn == 0x46bd) /* mov sp, r7 */
found_stack_adjust = 1;
- else if ((insn & 0xff00) == 0xb000) /* add sp, imm or sub sp, imm */
+ else if ((insn & 0xff80) == 0xb000) /* add sp, imm */
found_stack_adjust = 1;
else if ((insn & 0xfe00) == 0xbc00) /* pop <registers> */
{
@@ -3324,7 +3319,7 @@ thumb_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
if (insn2 == 0x46bd) /* mov sp, r7 */
found_stack_adjust = 1;
- else if ((insn2 & 0xff00) == 0xb000) /* add sp, imm or sub sp, imm */
+ else if ((insn2 & 0xff80) == 0xb000) /* add sp, imm */
found_stack_adjust = 1;
else if ((insn2 & 0xff00) == 0xbc00) /* pop <registers> without PC */
found_stack_adjust = 1;
--
1.9.0