Re: [PATCH] AARCH64: Change cpsr type to be 64bit.

[Mark Kettenis <mark dot kettenis at xs4all dot nl>]

> Date: Mon, 23 Dec 2013 17:39:00 +0000
> From: Yufeng Zhang <Yufeng.Zhang@arm.com>
> 
> On 12/20/13 17:47, Pedro Alves wrote:
> > On 12/18/2013 07:08 PM, Andrew Pinski wrote:
> >> As mentioned in http://www.spinics.net/lists/arm-kernel/msg290896.html, we should change gdb's notion of cpsr to be 64bit.
> >>
> >> OK?  Build and tested for aarch64-linux-gnu with no regressions.
> >> I also double checked to make sure that what is passed down from the kernel (via sigcontext), is the full 64bit.
> >
> > With this, the register will be exposed as 64-bit to the
> > user.  Is that desirable?  The fact that the original
> > description used 32-bit makes it sounds like it's not.
> > What's the real register width at the (asm visible)
> > machine level?
> 
> There is no access to CPSR as a single register in AArch64 (*). 
> Instead, process states can be accessed/modified via system 
> instructions.  I guess the kernel synthesizes one CPSR register, so if 
> kernel defines it as a 64-bit register, it is reasonable for gdb to 
> treat it of the same size as well.

Basing GDB's fundamentals on a particular OS's ptrace(2)
implementation is a bad idea.

> Reference:
> 
> * ARMv8 Instruction Set Overview - Chapter 3 A64 Overview

Wow, is the ARMv8 instruction set documentation really only available
to "ARM Custumers"?  How are we supposed to review patches for an
architecture for which we don't have access to the fundamental
documentation?