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RE: [PATCH V7 0/8] Intel(R) MPX register support


Hello Mark,

I am not sure I got it right. Is this a ok to commit?

If so, I still would like to do some changes before proceeding.
Basically I want to remove the x32 support since it makes no sense and a regression I caused.
Those changes where mentioned here:
 https://sourceware.org/ml/gdb-patches/2013-10/msg00513.html

To avoid sending you a full patch again my Idea is to send an ad-hoc patch to be added on top of my V7. 
While doing the commit then I would join then on the respective place.

Thanks a lot for your support and best regards,
-Fred



-----Original Message-----
From: Mark Kettenis [mailto:mark.kettenis@xs4all.nl] 
Sent: Monday, November 04, 2013 11:30 AM
To: Tedeschi, Walfred
Cc: Tedeschi, Walfred; tromey@redhat.com; gdb-patches@sourceware.org
Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support

> From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
> Date: Mon, 4 Nov 2013 09:06:06 +0000
> 
> Mark,
> 
> Do you think the proposal makes sense? 

Sorry.  No I don't think that makes sense.  So I think you should go ahead and commit your diff as-is (i.e. with both bndN and bndNraw register names).

Cheers,

Mark

> -----Original Message-----
> From: gdb-patches-owner@sourceware.org 
> [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Tedeschi, 
> Walfred
> Sent: Monday, October 21, 2013 1:33 PM
> To: Mark Kettenis
> Cc: tromey@redhat.com; gdb-patches@sourceware.org
> Subject: RE: [PATCH V7 0/8] Intel(R) MPX register support
> 
> Mark,
> 
> Our internal users of MPX found it useful to see the raw value, processed values and size together.
> They found out that it was really handy to avoid doing the complement of one for every bound manipulation.
> (I our first patch we changed the type system to add a complement of 
> one type, but this was considered overkill)
> 
> In this sense we would like still to display the bounds on a friendly manner to the user. When I say friendly I mean displaying values that are meaningful to the user.
> 	->Lower and upper bound should be presented as address format. 
> 	->No additional manipulation needed to calculate the upper bound limit.
> 
> On the other hand we could add the nice display on the python script and eliminate the pseudo register set, having only "bndN".
> 
> Would you be ok with such a change?
> (Having the pretty print only on the python side and eliminating the 
> bndraws)
> 
> 
> Thanks and regards,
> -Fred.
> 
> PS: You might use SDE to have an idea how it looks like.
> http://software.intel.com/en-us/articles/using-intel-mpx-with-the-inte
> l-software-development-emulator 
> http://software.intel.com/en-us/articles/intel-software-development-em
> ulator
> 
> 
> 
> -----Original Message-----
> From: gdb-patches-owner@sourceware.org 
> [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Mark Kettenis
> Sent: Sunday, October 20, 2013 9:23 PM
> To: Tedeschi, Walfred
> Cc: tromey@redhat.com; gdb-patches@sourceware.org; Tedeschi, Walfred
> Subject: Re: [PATCH V7 0/8] Intel(R) MPX register support
> 
> > From: Walfred Tedeschi <walfred.tedeschi@intel.com>
> > Cc: gdb-patches@sourceware.org, Walfred Tedeschi 
> > <walfred.tedeschi@intel.com>
> > 
> > Mark and all,
> > 
> > I have noticed no feedback on this patch series. 
> > Is there a major change that you would like to see in here?
> > 
> > Thanks a lot for your support,
> > Best regards,
> > -Fred
> 
> Walfred,
> 
> The only thing I'm still somewhat unhappy about the fact that this introduces the "bndNraw" register names in addition to the "bndN"
> names.  I think having both the "raw" and "cooked" variants present in GDB's user interface will be confusing.  But it is hard to decide what the right interface is for a feature that isn't available in hardware yet and people don't really have any experience with debugging code that uses MPX.
> 
> Intel GmbH
> Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft: 
> Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas 
> Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. 
> (BLZ 502 109 00) 600119052
> 
> Intel GmbH
> Dornacher Strasse 1
> 85622 Feldkirchen/Muenchen, Deutschland Sitz der Gesellschaft: 
> Feldkirchen bei Muenchen
> Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas 
> Lusk
> Registergericht: Muenchen HRB 47456
> Ust.-IdNr./VAT Registration No.: DE129385895 Citibank Frankfurt a.M. 
> (BLZ 502 109 00) 600119052
> 
> 
> 
Intel GmbH
Dornacher Strasse 1
85622 Feldkirchen/Muenchen, Deutschland
Sitz der Gesellschaft: Feldkirchen bei Muenchen
Geschaeftsfuehrer: Christian Lamprechter, Hannes Schwaderer, Douglas Lusk
Registergericht: Muenchen HRB 47456
Ust.-IdNr./VAT Registration No.: DE129385895
Citibank Frankfurt a.M. (BLZ 502 109 00) 600119052


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