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Re: [RFC/TileGX 2/6] simplify the handling of skip prologue for plt stub
- From: Jiong Wang <jiwang at tilera dot com>
- To: <gdb-patches at sourceware dot org>
- Cc: Yao Qi <yao at codesourcery dot com>, Pedro Alves <palves at redhat dot com>
- Date: Fri, 1 Mar 2013 18:35:24 +0800
- Subject: Re: [RFC/TileGX 2/6] simplify the handling of skip prologue for plt stub
- References: <50F91516.6010204@tilera.com> <20130118131511.GF3564@adacore.com> <50F9664D.2090008@tilera.com> <511F0FE9.8030300@codesourcery.com> <51243991.4040304@tilera.com> <51244CBA.4000009@codesourcery.com> <512623BE.2030608@tilera.com>
On 02/21/2013 09:40 PM, Jiong Wang wrote:
On 02/20/2013 12:10 PM, Yao Qi wrote:
Is it possible that the section layouts on two pages? I mean, if is
possible that NEXT_ADDR is within section FOO and page A, but the end
of section FOO is within page A + 1. If this is true, we need to
check to the min (page boundary, section boundary), otherwise, we
don't have to worry about it.
sure, and I guess the page boundary check is for the risk that the
next page is not in memory that need to be paged in.
but some of the time, we just need to analyze a few instructions
then we could get the result, so we only cross a page when necessary,
but this do not make sense for disk file access.
after a second think, I fell it's reasonable that
"section_table_xfer_memory_partial" do not handle those gap between
sections, because there is no bit on the disk file for those gap,
while if the debuggee is loaded and under running, then
target_read_memory will use ptrace to fetch runtime memory, then those
gap has physical map in memory, and set to zero.
for x86, this is a issue also. for a simple testcase
char *fmt = "x%d\n";
int main(int argc, char **argv)
{
printf(fmt, argc);
return 0;
}
gcc test.c
gdb a.out
(gdb) x/10 fmt
0x4005c0 <__dso_handle+8>: 174335352 Cannot access memory at
address 0x4005c4
(gdb) b main
Breakpoint 1 at 0x4004e0
(gdb) r
Starting program: /home/jiwang/GDB-TEST/a.out
Breakpoint 1, 0x00000000004004e0 in main ()
(gdb) x/10 fmt
0x4005c0 <__dso_handle+8>: 174335352 0 990059265 44
0x4005d0: 4 -552 72 -236
0x4005e0: 112 -184
so, I think fix this issue by checking section boundary simultaneously
is a bit strange, the clean and proper way is to stop skip_prologue
analysis when the pc is in plt stub.
below is the old patch, any one comments on this?
Ping, could anyone have a review on this?
gdb/ChangeLog:
* tilegx-tdep.c (tilegx_skip_prologue): simplify the handling for
plt stub.
--
Regards,
Jiong. Wang
Tilera Corporation.