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[patch v3 02/16] disas: add precise instructions flag
- From: markus dot t dot metzger at intel dot com
- To: gdb-patches at sourceware dot org
- Cc: markus dot t dot metzger at gmail dot com, jan dot kratochvil at redhat dot com, palves at redhat dot com, tromey at redhat dot com, kettenis at gnu dot org, Markus Metzger <markus dot t dot metzger at intel dot com>
- Date: Tue, 14 Aug 2012 14:59:17 +0200
- Subject: [patch v3 02/16] disas: add precise instructions flag
- References: <1344949171-9545-1-git-send-email-markus.t.metzger@intel.com>
From: Markus Metzger <markus.t.metzger@intel.com>
When disassembling an address range with interleaved sources, the addresses that
are being disassembled may not exactly match the specified range.
Addresses may be:
- added after the specified range
- omitted at the beginning of the specified range
Add a new disassembly flag that fixes the above two cases.
2012-08-14 Markus Metzger <markus.t.metzger@intel.com>
* disasm.h: Add new flag DISASSEMBLY_PRECISE_INSN.
* disasm.c (do_mixed_source_and_assembly): Adjust mle boundaries.
---
gdb/disasm.c | 26 ++++++++++++++++++++++----
gdb/disasm.h | 7 ++++---
2 files changed, 26 insertions(+), 7 deletions(-)
diff --git a/gdb/disasm.c b/gdb/disasm.c
index e3d3349..c5c35ea 100644
--- a/gdb/disasm.c
+++ b/gdb/disasm.c
@@ -217,13 +217,22 @@ do_mixed_source_and_assembly (struct gdbarch *gdbarch, struct ui_out *uiout,
/* First, skip all the preceding functions. */
- for (i = 0; i < nlines - 1 && le[i].pc < low; i++);
+ /* If we want precise instructions, we only skip the line entries for which
+ the pc range between this and the next entry precedes the requested
+ instruction range. */
+ if (flags & DISASSEMBLY_PRECISE_INSN)
+ for (i = 0; i < nlines - 2 && le[i + 1].pc <= low; i++);
+ else
+ for (i = 0; i < nlines - 1 && le[i].pc < low; i++);
/* Now, copy all entries before the end of this function. */
for (; i < nlines - 1 && le[i].pc < high; i++)
{
- if (le[i].line == le[i + 1].line && le[i].pc == le[i + 1].pc)
+ CORE_ADDR start = le[i].pc;
+ CORE_ADDR end = le[i + 1].pc;
+
+ if (le[i].line == le[i + 1].line && start == end)
continue; /* Ignore duplicates. */
/* Skip any end-of-function markers. */
@@ -233,8 +242,17 @@ do_mixed_source_and_assembly (struct gdbarch *gdbarch, struct ui_out *uiout,
mle[newlines].line = le[i].line;
if (le[i].line > le[i + 1].line)
out_of_order = 1;
- mle[newlines].start_pc = le[i].pc;
- mle[newlines].end_pc = le[i + 1].pc;
+
+ /* If we want precise instructions, adjust the line ranges to only contain
+ instructions in the requested range. */
+ if (flags & DISASSEMBLY_PRECISE_INSN)
+ {
+ end = min (end, high);
+ start = max (start, low);
+ }
+
+ mle[newlines].start_pc = start;
+ mle[newlines].end_pc = end;
newlines++;
}
diff --git a/gdb/disasm.h b/gdb/disasm.h
index 646ee8e..5b459f4 100644
--- a/gdb/disasm.h
+++ b/gdb/disasm.h
@@ -19,9 +19,10 @@
#ifndef DISASM_H
#define DISASM_H
-#define DISASSEMBLY_SOURCE (0x1 << 0)
-#define DISASSEMBLY_RAW_INSN (0x1 << 1)
-#define DISASSEMBLY_OMIT_FNAME (0x1 << 2)
+#define DISASSEMBLY_SOURCE (0x1 << 0)
+#define DISASSEMBLY_RAW_INSN (0x1 << 1)
+#define DISASSEMBLY_OMIT_FNAME (0x1 << 2)
+#define DISASSEMBLY_PRECISE_INSN (0x1 << 3)
struct ui_out;
struct ui_file;
--
1.7.1