[RFC] ARM support for Hardware breakpoints and watchpoints for native Linux.

[Matthew Gretton-Dann <matthew dot gretton-dann at arm dot com>]

All,

Please find attached a patch which adds support for hardware breakpoints
and watchpoints to ARM native Linux targets in gdb.

To use the patch you need the Linux Kernel tree exposed here:
http://repo.or.cz/w/linux-2.6/linux-wd.git/shortlog/refs/heads/hw-breakpoint
These kernel patches will soon be submitted to the ARM Linux Kernel
Mailing List which is archived here:
http://lists.infradead.org/pipermail/linux-arm-kernel/2010-July/thread.html

I am not looking for approval for the GDB patch set until the kernel
side has been approved.  However, if anyone has any comments on the
patch I would be most grateful.

Thanks,

Matt

-- 
Matthew Gretton-Dann
Principal Engineer - PDSW Tools
ARM Ltd

Index: gdb/arm-linux-nat.c
===================================================================
RCS file: /cvs/src/src/gdb/arm-linux-nat.c,v
retrieving revision 1.43
diff -r1.43 arm-linux-nat.c
28a29,30
> #include "observer.h"
> #include "gdbthread.h"
63a66,70
> #ifndef PTRACE_GETHBPREGS
> #define PTRACE_GETHBPREGS 29
> #define PTRACE_SETHBPREGS 30
> #endif
> 
737a745,1303
> /* Information describing the hardware breakpoint capabilities.  */
> struct arm_linux_hwbp_cap
> {
>   gdb_byte arch;
>   gdb_byte max_wp_length;
>   gdb_byte wp_count;
>   gdb_byte bp_count;
> };
> 
> /* Get hold of the Hardware Breakpoint information for the target we are
>    attached to.  Returns NULL if the kernel doesn't support Hardware 
>    breakpoints at all, or a pointer to the information structure.  */
> static const struct arm_linux_hwbp_cap*
> arm_linux_get_hwbp_cap (void)
> {
>   /* The info structure we return.  */
>   static struct arm_linux_hwbp_cap info;
> 
>   /* Is INFO in a good state?  -1 means that no attempt has been made to
>      initialize INFO; 0 means an attempt has been made, but it failed; 1
>      means INFO is in an initialized state.  */
>   static int available = -1;
> 
>   if (available == -1)
>     {
>       int tid;
>       CORE_ADDR val;
> 
>       tid = GET_THREAD_ID (inferior_ptid);
>       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
> 	available = 0;
>       else
> 	{
> 	  available = 1;
> 	  info.arch = (gdb_byte)((val >> 24) & 0xff);
> 	  info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
> 	  info.wp_count = (gdb_byte)((val >> 8) & 0xff);
> 	  info.bp_count = (gdb_byte)(val & 0xff);
> 	}
>     }
> 
>   return available == 1 ? &info : NULL;
> }
> 
> /* How many hardware breakpoints are available?  */
> static int
> arm_linux_get_hw_breakpoint_count (void)
> {
>   const struct arm_linux_hwbp_cap* cap = arm_linux_get_hwbp_cap ();
>   return cap != NULL ? cap->bp_count : 0;
> }
> 
> /* How many hardware watchpoints are available?  */
> static int
> arm_linux_get_hw_watchpoint_count (void)
> {
>   const struct arm_linux_hwbp_cap* cap = arm_linux_get_hwbp_cap ();
>   return cap != NULL ? cap->wp_count : 0;
> }
> 
> /* Have we got a free break-/watch-point available for use?  Returns -1 if
>    there is not an appropriate resource available, otherwise returns 1.  */
> static int
> arm_linux_can_use_hw_breakpoint (int type, int cnt, int ot)
> {
>   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
>       || type == bp_access_watchpoint || type == bp_watchpoint)
>     {
>       if (cnt > arm_linux_get_hw_watchpoint_count ())
> 	return -1;
>     }
>   else if (type == bp_hardware_breakpoint)
>     {
>       if (cnt > arm_linux_get_hw_breakpoint_count ())
> 	return -1;
>     }
>   else
>     gdb_assert (FALSE);
> 
>   return 1;
> }
> 
> /* Enum describing the different types of ARM hardware break-/watch-points.
>    */
> typedef enum
> {
>   arm_hwbp_break = 0,
>   arm_hwbp_load = 1,
>   arm_hwbp_store = 2,
>   arm_hwbp_access = 3
> } arm_hwbp_type;
> 
> /* Type describing an ARM Hardware Breakpoint Control register value.  */
> typedef CORE_ADDR arm_hwbp_control_t;
> 
> /* Structure used to keep track of hardware break-/watch-points.  */
> struct arm_linux_hw_breakpoint
> {
>   /* Address to break on, or being watched.  */
>   CORE_ADDR address;
>   /* Control register for break-/watch- point.  */
>   arm_hwbp_control_t control;
> };
> 
> /* Structure containing arrays of the break and watch points which are have
>    active in each thread.
> 
>    The Linux ptrace interface to hardware break-/watch-points presents the 
>    values in a vector centred around 0 (which is used fo generic information).
>    Positive indicies refer to breakpoint addresses/control registers, negative
>    indices to watchpoint addresses/control registers.
> 
>    The Linux vector is indexed as follows:
>       -((i << 1) + 2): Control register for watchpoint i.
>       -((i << 1) + 1): Address register for watchpoint i.
>                     0: Information register.
>        ((i << 1) + 1): Address register for breakpoint i.
>        ((i << 1) + 2): Control register for breakpoint i.
> 
>    This structure is used as a per-thread cache of the state stored by the 
>    kernel, so that we don't need to keep calling into the kernel to find a 
>    free breakpoint.
> 
>    We treat break-/watch-points with their enable bit clear as being deleted.
>    */
> typedef struct arm_linux_thread_points
> {
>   /* Thread ID.  */
>   int tid;
>   /* Breakpoints for thread.  */
>   struct arm_linux_hw_breakpoint* bpts;
>   /* Watchpoint for threads.  */
>   struct arm_linux_hw_breakpoint* wpts;
> } *arm_linux_thread_points_p;
> DEF_VEC_P (arm_linux_thread_points_p);
> 
> /* Vector of hardware breakpoints for each thread.  */
> VEC(arm_linux_thread_points_p) *arm_threads = NULL;
> 
> /* Find the list of hardware break-/watch-points for a thread with id TID.
>    If no list exists for TID we return NULL if ALLOC_NEW is 0, otherwise we
>    create a new list and return that.  */
> static struct arm_linux_thread_points*
> arm_linux_find_breakpoints_by_tid (int tid, int alloc_new)
> {
>   int i;
>   struct arm_linux_thread_points* t;
> 
>   for (i = 0; VEC_iterate (arm_linux_thread_points_p, arm_threads, i, t);
>        ++i)
>     {
>       if (t->tid == tid)
> 	return t;
>     }
> 
>   t = NULL;
> 
>   if (alloc_new)
>     {
>       t = xmalloc (sizeof (struct arm_linux_thread_points));
>       t->tid = tid;
>       t->bpts = xzalloc (arm_linux_get_hw_breakpoint_count ()
> 			 * sizeof (struct arm_linux_hw_breakpoint));
>       t->wpts = xzalloc (arm_linux_get_hw_watchpoint_count ()
> 			 * sizeof (struct arm_linux_hw_breakpoint));
>       VEC_safe_push (arm_linux_thread_points_p, arm_threads, t);
>     }
> 
>   return t;
> }
> 
> /* Initialize an ARM hardware break-/watch-point control register value.
>    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the 
>    type of break-/watch-point; ENABLE indicates whether the point is enabled.
>    */
> static arm_hwbp_control_t 
> arm_hwbp_control_initialize (unsigned byte_address_select,
> 			     arm_hwbp_type hwbp_type,
> 			     int enable)
> {
>   gdb_assert ((byte_address_select & ~0xffU) == 0);
>   gdb_assert (hwbp_type != arm_hwbp_break 
> 	      || ((byte_address_select & 0xfU) != 0));
> 
>   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
> }
> 
> /* Does the breakpoint control value CONTROL have the enable bit set?  */
> static int
> arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
> {
>   return control & 0x1;
> }
> 
> /* Change a breakpoint control word so that it is in the disabled state.  */
> static arm_hwbp_control_t
> arm_hwbp_control_disable (arm_hwbp_control_t control)
> {
>   return control & ~0x1;
> }
> 
> /* Initialise the hardware breakpoint structure P.  The breakpoint will be
>    enabled, and will point to the placed address of BP_TGT.  */
> static void
> arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
> 				    struct bp_target_info *bp_tgt,
> 				    struct arm_linux_hw_breakpoint *p)
> {
>   unsigned mask;
>   CORE_ADDR address = bp_tgt->placed_address;
> 
>   /* We have to create a mask for the control register which says which bits
>      of the word pointed to by address to break on.  */
>   if (arm_pc_is_thumb (address))
>     mask = 0x3 << (address & 2);
>   else
>     mask = 0xf;
> 
>   p->address = address & ~3;
>   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
> }
> 
> /* Get the ARM hardware breakpoint type from the RW value we're given when
>    asked to set a watchpoint.  */
> static arm_hwbp_type 
> arm_linux_get_hwbp_type (int rw)
> {
>   if (rw == hw_read)
>     return arm_hwbp_load;
>   else if (rw == hw_write)
>     return arm_hwbp_store;
>   else
>     return arm_hwbp_access;
> }
> 
> /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
>    to LEN.  The type of watchpoint is given in RW.  */
> static void
> arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
> 				    struct arm_linux_hw_breakpoint *p)
> {
>   const struct arm_linux_hwbp_cap* cap = arm_linux_get_hwbp_cap ();
>   unsigned mask;
> 
>   gdb_assert (cap != NULL);
>   gdb_assert (cap->max_wp_length != 0);
> 
>   mask = (1 << len) - 1;
> 
>   p->address = addr;
>   p->control = arm_hwbp_control_initialize (mask, 
> 					    arm_linux_get_hwbp_type (rw), 1);
> }
> 
> /* Are two break-/watch-points equal?  */
> static int
> arm_linux_hw_breakpoint_equal(const struct arm_linux_hw_breakpoint *p1,
> 			      const struct arm_linux_hw_breakpoint *p2)
> {
>   return p1->address == p2->address && p1->control == p2->control;
> }
> 
> /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
>    =1) BPT for thread TID.  */
> static void
> arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt, 
> 				int tid, int watchpoint)
> {
>   struct arm_linux_thread_points *t = arm_linux_find_breakpoints_by_tid (tid, 1);
>   gdb_byte count, i;
>   struct arm_linux_hw_breakpoint* bpts;
>   int dir;
> 
>   gdb_assert (t != NULL);
> 
>   if (watchpoint)
>     {
>       count = arm_linux_get_hw_watchpoint_count ();
>       bpts = t->wpts;
>       dir = -1;
>     }
>   else
>     {
>       count = arm_linux_get_hw_breakpoint_count ();
>       bpts = t->bpts;
>       dir = 1;
>     }
> 
>   for (i = 0; i < count; ++i)
>     if (!arm_hwbp_control_is_enabled (bpts[i].control))
>       {
> 	errno = 0;
> 	if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 1), 
> 		    &bpt->address) < 0)
> 	  perror_with_name (_("Unexpected error setting breakpoint address"));
> 	if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 2), 
> 		    &bpt->control) < 0)
> 	  perror_with_name (_("Unexpected error setting breakpoint"));
> 
> 	memcpy (bpts + i, bpt, sizeof (struct arm_linux_hw_breakpoint));
> 	break;
>       }
> 
>   gdb_assert (i != count);
> }
> 
> /* Rmove the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
>    =1) BPT for thread TID.  */
> static void
> arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt, 
> 				int tid, int watchpoint)
> {
>   struct arm_linux_thread_points *t = arm_linux_find_breakpoints_by_tid (tid, 0);
>   gdb_byte count, i;
>   struct arm_linux_hw_breakpoint* bpts;
>   int dir;
> 
>   gdb_assert (t != NULL);
> 
>   if (watchpoint)
>     {
>       count = arm_linux_get_hw_watchpoint_count ();
>       bpts = t->wpts;
>       dir = -1;
>     }
>   else
>     {
>       count = arm_linux_get_hw_breakpoint_count ();
>       bpts = t->bpts;
>       dir = 1;
>     }
> 
>   for (i = 0; i < count; ++i)
>     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
>       {
> 	errno = 0;
> 	bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
> 	if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 2), 
> 		    &bpts[i].control) < 0)
> 	  perror_with_name (_("Unexpected error clearing breakpoint"));
> 	break;
>       }
> 
>   gdb_assert (i != count);
> }
> 
> /* Insert a Hardware breakpoint.  */
> static int
> arm_linux_insert_hw_breakpoint (struct gdbarch *gdbarch, 
> 				struct bp_target_info *bp_tgt)
> {
>   ptid_t ptid;
>   struct lwp_info *lp;
>   struct arm_linux_hw_breakpoint p;
> 
>   if (arm_linux_get_hw_breakpoint_count () == 0)
>     return -1;
> 
>   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
>   ALL_LWPS (lp, ptid)
>     arm_linux_insert_hw_breakpoint1 (&p, TIDGET (ptid), 0);
> 
>   return 0;
> }
> 
> /* Remove a hardware breakpoint.  */
> static int
> arm_linux_remove_hw_breakpoint (struct gdbarch *gdbarch, 
> 				struct bp_target_info *bp_tgt)
> {
>   ptid_t ptid;
>   struct lwp_info *lp;
>   struct arm_linux_hw_breakpoint p;
> 
>   if (arm_linux_get_hw_breakpoint_count () == 0)
>     return -1;
> 
>   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
>   ALL_LWPS (lp, ptid)
>     arm_linux_remove_hw_breakpoint1 (&p, TIDGET (ptid), 0);
> 
>   return 0;
> }
> 
> /* Are we able to use a hardware watchpoint for the LEN bytes starting at 
>    ADDR?  */
> static int
> arm_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
> {
>   const struct arm_linux_hwbp_cap* cap = arm_linux_get_hwbp_cap ();
>   CORE_ADDR max_wp_length, aligned_addr;
> 
>   /* Can not set watchpoints for zero or negative lengths.  */
>   if (len <= 0)
>     return 0;
> 
>   /* Need to be able to use the ptrace interface.  */
>   if (cap == NULL || cap->wp_count == 0)
>     return 0;
> 
>   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
>      range covered by a watchpoint.  */
>   max_wp_length = (CORE_ADDR)cap->max_wp_length;
>   aligned_addr = addr & ~(max_wp_length - 1);
> 
>   if (aligned_addr + max_wp_length < addr + len)
>     return 0;
> 
>   /* The current ptrace interface can only handle watchpoints that are a
>      power of 2.  */
>   if ((len & (len - 1)) != 0)
>     return 0;
> 
>   /* All tests passed so we must be able to set a watchpoint.  */
>   return 1;
> }
> 
> /* Insert a Hardware breakpoint.  */
> static int
> arm_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw)
> {
>   ptid_t ptid;
>   struct lwp_info *lp;
>   struct arm_linux_hw_breakpoint p;
> 
>   if (arm_linux_get_hw_watchpoint_count () == 0)
>     return -1;
> 
>   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
>   ALL_LWPS (lp, ptid)
>     arm_linux_insert_hw_breakpoint1 (&p, TIDGET (ptid), 1);
> 
>   return 0;
> }
> 
> /* Remove a hardware breakpoint.  */
> static int
> arm_linux_remove_watchpoint (CORE_ADDR addr, int len, int rw)
> {
>   ptid_t ptid;
>   struct lwp_info *lp;
>   struct arm_linux_hw_breakpoint p;
> 
>   if (arm_linux_get_hw_watchpoint_count () == 0)
>     return -1;
> 
>   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
>   ALL_LWPS (lp, ptid)
>     arm_linux_remove_hw_breakpoint1 (&p, TIDGET (ptid), 1);
> 
>   return 0;
> }
> 
> /* What was the data address the target was stopped on accessing.  */
> static int
> arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
> {
>   struct siginfo *siginfo_p = linux_nat_get_siginfo (inferior_ptid);
>   int slot = siginfo_p->si_errno;
> 
>   /* This must be a hardware breakpoint.  */
>   if (siginfo_p->si_signo != SIGTRAP
>       || (siginfo_p->si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
>     return 0;
> 
>   /* We must be able to set hardware watchpoints.  */
>   if (arm_linux_get_hw_watchpoint_count () == 0)
>     return 0;
> 
>   /* If we are in a positive slot then we're looking at a breakpoint and not
>      a watchpoint.  */
>   if (slot >= 0)
>     return 0;
> 
>   *addr_p = (CORE_ADDR) (uintptr_t) siginfo_p->si_addr;
>   return 1;
> }
> 
> /* Has the target been stopped by hitting a watchpoint?  */
> static int
> arm_linux_stopped_by_watchpoint (void)
> {
>   CORE_ADDR addr;
>   return arm_linux_stopped_data_address (&current_target, &addr);
> }
> 
> static int
> arm_linux_watchpoint_addr_within_range (struct target_ops *target,
> 					CORE_ADDR addr,
> 					CORE_ADDR start, int length)
> {
>   return start <= addr && start + length - 1 >= addr;
> }
> 
> /* Handle thread creation.  We need to copy the breakpoints and watchpoints
>    in the parent thread to the child trhead.  */
> static void
> arm_linux_new_thread (ptid_t ptid)
> {
>   int tid = TIDGET (ptid);
>   const struct arm_linux_hwbp_cap* info = arm_linux_get_hwbp_cap ();
> 
>   if (info != NULL)
>     {
>       int i;
>       struct arm_linux_thread_points *p;
>       struct arm_linux_hw_breakpoint* bpts;
> 
>       if (VEC_empty (arm_linux_thread_points_p, arm_threads))
> 	return;
> 
>       /* Get a list of breakpoints from any thread. */
>       p = VEC_last (arm_linux_thread_points_p, arm_threads);
> 
>       /* Copy that thread's breakpoints and watchpoints to the new thread. */
>       for (i = 0; i < info->bp_count; i++)
> 	{
> 	  if (arm_hwbp_control_is_enabled (p->bpts[i].control))
> 	    arm_linux_insert_hw_breakpoint1 (p->bpts + i, tid, 0);
> 	  if (arm_hwbp_control_is_enabled (p->wpts[i].control))
> 	    arm_linux_insert_hw_breakpoint1 (p->wpts + i, tid, 1);
> 	}
>     }
> }
> 
> /* Handle thread exit.  Tidy up the memory that has been allocated for the
>    thread.  */
> static void
> arm_linux_thread_exit (struct thread_info *tp, int silent)
> {
>   const struct arm_linux_hwbp_cap* info = arm_linux_get_hwbp_cap ();
> 
>   if (info != NULL)
>     {
>       int i;
>       int tid = TIDGET (tp->ptid);
>       struct arm_linux_thread_points *t = NULL, *p;
> 
>       for (i = 0; 
> 	   VEC_iterate (arm_linux_thread_points_p, arm_threads, i, p); i++)
> 	{
> 	  if (p->tid == tid)
> 	    {
> 	      t = p;
> 	      break;
> 	    }
> 	}
> 
>       if (t == NULL)
> 	return;
> 
>       VEC_unordered_remove (arm_linux_thread_points_p, arm_threads, i);
> 
>       xfree (t->bpts);
>       xfree (t->wpts);
>       xfree (t);
>     }
> }
> 
753a1320,1330
>   /* Add our hardware breakpoint and watchpoint implementation.  */
>   t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
>   t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
>   t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
>   t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
>   t->to_insert_watchpoint = arm_linux_insert_watchpoint;
>   t->to_remove_watchpoint = arm_linux_remove_watchpoint;
>   t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
>   t->to_stopped_data_address = arm_linux_stopped_data_address;
>   t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
> 
757a1335,1338
> 
>   /* Handle thread creation and exit */
>   observer_attach_thread_exit (arm_linux_thread_exit);
>   linux_nat_set_new_thread (t, arm_linux_new_thread);
Index: gdb/arm-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/arm-tdep.c,v
retrieving revision 1.304
diff -r1.304 arm-tdep.c
349c349
< static int
---
> int
6868a6869,6872
>   /* Watchpoints are not steppable.  */
>   set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
>   set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
> 
Index: gdb/arm-tdep.h
===================================================================
RCS file: /cvs/src/src/gdb/arm-tdep.h,v
retrieving revision 1.40
diff -r1.40 arm-tdep.h
304a305,308
> /* Is the instruction at the given memory address a Thumb or ARM
>    instruction?  */
> extern int arm_pc_is_thumb (CORE_ADDR memaddd);
> 
Index: gdb/testsuite/gdb.base/hbreak.exp
===================================================================
RCS file: /cvs/src/src/gdb/testsuite/gdb.base/hbreak.exp,v
retrieving revision 1.3
diff -r1.3 hbreak.exp
18c18
<      && ![istarget "ia64-*-*"])
---
>      && ![istarget "ia64-*-*"] && ![istarget "arm*-*-*"])
Index: gdb/testsuite/gdb.base/watchpoint-hw-hit-once.exp
===================================================================
RCS file: /cvs/src/src/gdb/testsuite/gdb.base/watchpoint-hw-hit-once.exp,v
retrieving revision 1.3
diff -r1.3 watchpoint-hw-hit-once.exp
18c18
<      && ![istarget "ia64-*-*"])
---
>      && ![istarget "ia64-*-*"] && ![istarget "arm*-*-*"])
Index: gdb/testsuite/gdb.base/watchpoint-hw.exp
===================================================================
RCS file: /cvs/src/src/gdb/testsuite/gdb.base/watchpoint-hw.exp,v
retrieving revision 1.3
diff -r1.3 watchpoint-hw.exp
18c18,19
<      && ![istarget "ia64-*-*"] && ![istarget "s390*-*-*"])
---
>      && ![istarget "ia64-*-*"] && ![istarget "s390*-*-*"]
>      && ![istarget "arm*-*-*"])