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[PATCH][SH] Fix a few architecture variant settings


Hi,

I recently noticed that GDB claims that the 'fake' SH architecture "sh2a-or-sh4" does not have FP registers:

(gdb) show architecture
The target architecture is set automatically (currently sh2a-or-sh4)
(gdb) info float
No floating-point info available for this processor.

This is not true - sh2a-or-sh4 is the intersection between the SH-2A and SH-4 architectures, both of which have double-precision FP. This assembler/linker automatically select this architecture when FP instructions are used, but they cannot tell which architecture was intended (the two architectures are incompatible in some ways, but there are a set of programs that will run on both).

When examining the source I also noticed that a number of architectures have no specific 'regs' command variant configured (causing them to default to the most basic variant).

This patch solves both problem problems.

OK?

Andrew
2009-10-10  Andrew Stubbs  <ams@codesourcery.com>

	* sh-tdep.c (sh_gdbarch_init): Add show_regs settings for
	bfd_mach_sh3_nommu, bfd_mach_sh2a_nofpu_or_sh3_nommu,
	bfd_mach_sh2a_or_sh3e, bfd_mach_sh2a_or_sh4, bfd_mach_sh4_nommu_nofpu,
	and bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu.
	Move bfd_mach_sh2a_or_sh4 to use the same configuration as
	bfd_mach_sh4.

---
 gdb/sh-tdep.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)


--- gdb/sh-tdep.c
+++ gdb/sh-tdep.c
@@ -2762,10 +2762,13 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
       break;
 
     case bfd_mach_sh3:
+    case bfd_mach_sh3_nommu:
+    case bfd_mach_sh2a_nofpu_or_sh3_nommu:
       sh_show_regs = sh3_show_regs;
       break;
 
     case bfd_mach_sh3e:
+    case bfd_mach_sh2a_or_sh3e:
       sh_show_regs = sh3e_show_regs;
       break;
 
@@ -2776,11 +2779,14 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
     case bfd_mach_sh4:
     case bfd_mach_sh4a:
+    case bfd_mach_sh2a_or_sh4:
       sh_show_regs = sh4_show_regs;
       break;
 
     case bfd_mach_sh4_nofpu:
+    case bfd_mach_sh4_nommu_nofpu:
     case bfd_mach_sh4a_nofpu:
+    case bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu:
       sh_show_regs = sh4_nofpu_show_regs;
       break;
 
@@ -2914,6 +2920,7 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 
     case bfd_mach_sh4:
     case bfd_mach_sh4a:
+    case bfd_mach_sh2a_or_sh4:
       set_gdbarch_register_name (gdbarch, sh_sh4_register_name);
       set_gdbarch_register_type (gdbarch, sh_sh4_register_type);
       set_gdbarch_fp0_regnum (gdbarch, 25);
@@ -2928,7 +2935,6 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
     case bfd_mach_sh4a_nofpu:
     case bfd_mach_sh4_nommu_nofpu:
     case bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu:
-    case bfd_mach_sh2a_or_sh4:
       set_gdbarch_register_name (gdbarch, sh_sh4_nofpu_register_name);
       break;
 

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