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Re: i386.record.floating.point.patch : with more testing and assurity
- From: paawan oza <paawan1982 at yahoo dot com>
- To: Hui Zhu <teawater at gmail dot com>
- Cc: Michael Snyder <msnyder at vmware dot com>, Mark Kettenis <mark dot kettenis at xs4all dot nl>, "pedro at codesourcery dot com" <pedro at codesourcery dot com>, "gdb-patches at sourceware dot org" <gdb-patches at sourceware dot org>
- Date: Mon, 6 Jul 2009 12:04:58 -0700 (PDT)
- Subject: Re: i386.record.floating.point.patch : with more testing and assurity
Hi,
please find the latest patch and ChangeLog as follows.
********************
ChangeLog
********************
Current: gdb-6.8.50.20090706
2009-07-06 Oza <paawan1982@yahoo.com>
* i386-tdep.c: Support for floating point recording.
***************************
i386.records.floats.patch
***************************
diff -urN ./gdb.orig/i386-tdep.c gdb.new/i386-tdep.c
--- ./gdb.orig/i386-tdep.c 2009-07-02 13:25:54.000000000 -0400
+++ gdb.new/i386-tdep.c 2009-07-06 23:44:07.000000000 -0400
@@ -3056,6 +3056,66 @@
return 0;
}
+
+/* Defines contents to record. */
+#define I386_SAVE_FPU_REGS 0xfffd
+#define I386_SAVE_FPU_ENV 0xfffe
+#define I386_SAVE_FPU_ENV_REG_STACK 0xffff
+
+/* Record the value of floating point registers which will be changed by the
+ Current instruction to "record_arch_list".
+ Return -1 if something is wrong. */
+
+static int i386_record_floats(struct gdbarch *gdbarch,
+ struct i386_record_s *ir,
+ uint32_t iregnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int i;
+
+ /* Oza : because of floating point insn push/pop of fpu stack
+ Is going to happen. currently we store st0-st7 registers,
+ But we need not store all registers all the time, In future
+ We use ftag register and record only those who are not marked as an empty.
+ */
+ if (I386_SAVE_FPU_REGS == iregnum)
+ {
+ for (i = I387_ST0_REGNUM (tdep);i <= I387_ST0_REGNUM (tdep) + 7;i++)
+ {
+ if (record_arch_list_add_reg (ir->regcache,i))
+ return -1;
+ }
+ }
+ else if (I386_SAVE_FPU_ENV == iregnum)
+ {
+ for (i = I387_FCTRL_REGNUM(tdep);i <= I387_FOP_REGNUM(tdep);i++)
+ {
+ if (record_arch_list_add_reg (ir->regcache,i))
+ return -1;
+ }
+ }
+ else if (I386_SAVE_FPU_ENV_REG_STACK == iregnum)
+ {
+ for (i = I387_ST0_REGNUM (tdep);i <= I387_FOP_REGNUM(tdep);i++)
+ {
+ if (record_arch_list_add_reg (ir->regcache,i))
+ return -1;
+ }
+ }
+ else if ((iregnum >= I387_ST0_REGNUM (tdep)) &&
+ (iregnum <= I387_FOP_REGNUM(tdep)))
+ {
+ if (record_arch_list_add_reg (ir->regcache,iregnum))
+ return -1;
+ }
+ else
+ {
+ /* Parameter error. */
+ return -1;
+ }
+ return 0;
+}
+
/* Parse the current instruction and record the values of the registers and
memory that will be changed in current instruction to "record_arch_list".
Return -1 if something wrong. */
@@ -3070,6 +3130,7 @@
uint32_t tmpu32;
uint32_t opcode;
struct i386_record_s ir;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
memset (&ir, 0, sizeof (struct i386_record_s));
ir.regcache = regcache;
@@ -4105,8 +4166,7 @@
}
break;
- /* floats */
- /* It just record the memory change of instrcution. */
+ /* Floats. */
case 0xd8:
case 0xd9:
case 0xda:
@@ -4120,46 +4180,57 @@
ir.reg |= ((opcode & 7) << 3);
if (ir.mod != 3)
{
- /* memory */
+ /* Memory. */
uint32_t addr;
if (i386_record_lea_modrm_addr (&ir, &addr))
return -1;
switch (ir.reg)
{
- case 0x00:
- case 0x01:
case 0x02:
- case 0x03:
+ case 0x12:
+ case 0x22:
+ case 0x32:
+ /* For fcom, ficom nothing to do. */
+ break;
+ case 0x03:
+ case 0x13:
+ case 0x23:
+ case 0x33:
+ /* For fcomp, ficomp pop FPU stack, store all. */
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ break;
+ case 0x00:
+ case 0x01:
case 0x04:
case 0x05:
case 0x06:
case 0x07:
case 0x10:
- case 0x11:
- case 0x12:
- case 0x13:
+ case 0x11:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
case 0x20:
case 0x21:
- case 0x22:
- case 0x23:
case 0x24:
case 0x25:
case 0x26:
case 0x27:
case 0x30:
case 0x31:
- case 0x32:
- case 0x33:
case 0x34:
case 0x35:
case 0x36:
case 0x37:
- break;
+ /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
+ fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension of code,
+ Always affects st(0) register. */
+ if (i386_record_floats(gdbarch, &ir, I387_ST0_REGNUM (tdep)))
+ return -1;
+ break;
case 0x08:
case 0x0a:
case 0x0b:
@@ -4167,6 +4238,7 @@
case 0x19:
case 0x1a:
case 0x1b:
+ case 0x1d:
case 0x28:
case 0x29:
case 0x2a:
@@ -4174,11 +4246,16 @@
case 0x38:
case 0x39:
case 0x3a:
- case 0x3b:
+ case 0x3b:
+ case 0x3c:
+ case 0x3d:
switch (ir.reg & 7)
{
case 0:
- break;
+ /* Handling fld, fild. */
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ break;
case 1:
switch (ir.reg >> 4)
{
@@ -4191,6 +4268,7 @@
return -1;
break;
case 3:
+ break;
default:
if (record_arch_list_add_mem (addr, 2))
return -1;
@@ -4201,15 +4279,48 @@
switch (ir.reg >> 4)
{
case 0:
+ if (record_arch_list_add_mem (addr, 4))
+ return -1;
+ if (3 == (ir.reg & 7))
+ {
+ /* For fstp m32fp */
+ if (i386_record_floats(gdbarch, &ir, \
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ break;
case 1:
if (record_arch_list_add_mem (addr, 4))
return -1;
+ if ((3 == (ir.reg & 7)) \
+ || (5 == (ir.reg & 7)) \
+ || (7 == (ir.reg & 7)))
+ {
+ /* For fstp insn */
+ if (i386_record_floats(gdbarch, &ir, \
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
break;
case 2:
if (record_arch_list_add_mem (addr, 8))
return -1;
+ if (3 == (ir.reg & 7))
+ {
+ /* For fstp m64fp */
+ if (i386_record_floats(gdbarch, &ir, \
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
break;
case 3:
+ if ((3 <= (ir.reg & 7)) && (6 <= (ir.reg & 7)))
+ {
+ /* For fistp, fbld, fild, fbstp. */
+ if (i386_record_floats(gdbarch, &ir, \
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
default:
if (record_arch_list_add_mem (addr, 2))
return -1;
@@ -4218,54 +4329,74 @@
break;
}
break;
- case 0x0c:
- case 0x0d:
- case 0x1d:
- case 0x2c:
- case 0x3c:
- case 0x3d:
- break;
- case 0x0e:
+ case 0x0c:
+ /* Insn fldenv. */
+ if (i386_record_floats(gdbarch, &ir, \
+ I386_SAVE_FPU_ENV_REG_STACK))
+ return -1;
+ break;
+ case 0x0d:
+ /* Insn fldcw. */
+ if (i386_record_floats(gdbarch, &ir, I387_FCTRL_REGNUM (tdep)))
+ return -1;
+ break;
+ case 0x2c:
+ /* Insn frstor. */
+ if (i386_record_floats(gdbarch, &ir, \
+ I386_SAVE_FPU_ENV_REG_STACK))
+ return -1;
+ break;
+ case 0x0e:
if (ir.dflag)
{
- if (record_arch_list_add_mem (addr, 28))
- return -1;
+ if (record_arch_list_add_mem (addr, 28))
+ return -1;
}
else
{
- if (record_arch_list_add_mem (addr, 14))
- return -1;
+ if (record_arch_list_add_mem (addr, 14))
+ return -1;
}
break;
- case 0x0f:
- case 0x2f:
+ case 0x0f:
+ case 0x2f:
if (record_arch_list_add_mem (addr, 2))
return -1;
break;
- case 0x1f:
- case 0x3e:
+ case 0x1f:
+ case 0x3e:
if (record_arch_list_add_mem (addr, 10))
return -1;
+ /* Insn fstp, fbstp. */
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
break;
- case 0x2e:
+ case 0x2e:
if (ir.dflag)
{
- if (record_arch_list_add_mem (addr, 28))
- return -1;
- addr += 28;
+ if (record_arch_list_add_mem (addr, 28))
+ return -1;
+ addr += 28;
}
else
{
- if (record_arch_list_add_mem (addr, 14))
- return -1;
- addr += 14;
+ if (record_arch_list_add_mem (addr, 14))
+ return -1;
+ addr += 14;
}
if (record_arch_list_add_mem (addr, 80))
return -1;
+ /* Insn fsave. */
+ if (i386_record_floats(gdbarch, &ir, \
+ I386_SAVE_FPU_ENV_REG_STACK))
+ return -1;
break;
- case 0x3f:
+ case 0x3f:
if (record_arch_list_add_mem (addr, 8))
return -1;
+ /* Ins fistp. */
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
break;
default:
ir.addr -= 2;
@@ -4273,9 +4404,198 @@
goto no_support;
break;
}
- }
+ }
+ /* Opcode is an extension of modR/M byte. */
+ else
+ {
+ switch (opcode)
+ {
+ case 0xd8:
+ if (i386_record_floats(gdbarch, &ir, I387_ST0_REGNUM (tdep)))
+ return -1;
+ break;
+ case 0xd9:
+ if (0x0c == (ir.modrm >> 4))
+ {
+ if ((ir.modrm & 0x0f) <= 7)
+ {
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ else
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep)))
+ return -1;
+ /* If only st(0) is changing, then we have already recorded */
+ if ((ir.modrm & 0x0f) - 0x08)
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep) + ((ir.modrm & 0x0f) - 0x08)))
+ return -1;
+ }
+ }
+ }
+ else
+ {
+ switch(ir.modrm)
+ {
+ case 0xe0:
+ case 0xe1:
+ case 0xf0:
+ case 0xf5:
+ case 0xf8:
+ case 0xfa:
+ case 0xfc:
+ case 0xfe:
+ case 0xff:
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep)))
+ return -1;
+ break;
+ case 0xf1:
+ case 0xf2:
+ case 0xf3:
+ case 0xf4:
+ case 0xf6:
+ case 0xf7:
+ case 0xe8:
+ case 0xe9:
+ case 0xea:
+ case 0xeb:
+ case 0xec:
+ case 0xed:
+ case 0xee:
+ case 0xf9:
+ case 0xfb:
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ break;
+ case 0xfd:
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep)))
+ return -1;
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep) + 1))
+ return -1;
+ break;
+ }
+ }
+ break;
+ case 0xda:
+ if (0xe9 == ir.modrm)
+ {
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
+ {
+ if (i386_record_floats(gdbarch, &ir, I387_ST0_REGNUM (tdep)))
+ return -1;
+ if (((ir.modrm & 0x0f) > 0) && ((ir.modrm & 0x0f) <= 7))
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep) + (ir.modrm & 0x0f)))
+ return -1;
+ }
+ else if ((ir.modrm & 0x0f) - 0x08)
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep) + ((ir.modrm & 0x0f) - 0x08)))
+ return -1;
+ }
+ }
+ break;
+ case 0xdb:
+ if (0xe3 == ir.modrm)
+ {
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_ENV))
+ return -1;
+ }
+ else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
+ {
+ if (i386_record_floats(gdbarch, &ir, I387_ST0_REGNUM (tdep)))
+ return -1;
+ if (((ir.modrm & 0x0f) > 0) && ((ir.modrm & 0x0f) <= 7))
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep) + (ir.modrm & 0x0f)))
+ return -1;
+ }
+ else if ((ir.modrm & 0x0f) - 0x08)
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep) + ((ir.modrm & 0x0f) - 0x08)))
+ return -1;
+ }
+ }
+ break;
+ case 0xdc:
+ if ( (0x0c == ir.modrm >> 4) \
+ || (0x0d == ir.modrm >> 4) \
+ || (0x0f == ir.modrm >> 4))
+ {
+ if ((ir.modrm & 0x0f) <= 7)
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep) + (ir.modrm & 0x0f)))
+ return -1;
+ }
+ else
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep) + ((ir.modrm & 0x0f) - 0x08)))
+ return -1;
+ }
+ }
+ break;
+ case 0xdd:
+ if (0x0c == ir.modrm >> 4)
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_FTAG_REGNUM (tdep)))
+ return -1;
+ }
+ else if ((0x0d == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
+ {
+ if ((ir.modrm & 0x0f) <= 7)
+ {
+ if (i386_record_floats(gdbarch, &ir, \
+ I387_ST0_REGNUM (tdep) + (ir.modrm & 0x0f)))
+ return -1;
+ }
+ else
+ {
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ }
+ break;
+ case 0xde:
+ if ((0x0c == ir.modrm >> 4) \
+ || (0x0e == ir.modrm >> 4) \
+ || (0x0f == ir.modrm >> 4) \
+ || (0xd9 == ir.modrm))
+ {
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ break;
+ case 0xdf:
+ if (0xe0 == ir.modrm)
+ {
+ if (record_arch_list_add_reg (ir.regcache, I386_EAX_REGNUM))
+ return -1;
+ }
+ else if ((0x0f == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
+ {
+ if (i386_record_floats(gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ break;
+ }
+ }
break;
-
/* string ops */
/* movsS */
case 0xa4:
@@ -4694,10 +5014,17 @@
/* fwait */
/* XXX */
case 0x9b:
- printf_unfiltered (_("Process record doesn't support instruction "
- "fwait.\n"));
- ir.addr -= 1;
- goto no_support;
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr 0x%s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ opcode = (uint32_t) tmpu8;
+ ir.addr++;
+ goto reswitch;
break;
/* int3 */
--- On Sun, 7/5/09, Hui Zhu <teawater@gmail.com> wrote:
> From: Hui Zhu <teawater@gmail.com>
> Subject: Re: i386.record.floating.point.patch : with more testing and assurity
> To: "paawan oza" <paawan1982@yahoo.com>
> Cc: "Michael Snyder" <msnyder@vmware.com>, "Mark Kettenis" <mark.kettenis@xs4all.nl>, "pedro@codesourcery.com" <pedro@codesourcery.com>, "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
> Date: Sunday, July 5, 2009, 3:45 PM
> Hi Paawan,
>
> 1.? gcc -g -O2???-I. -I../../src/gdb
> -I../../src/gdb/common
> -I../../src/gdb/config
> -DLOCALEDIR="\"/usr/local/share/locale\""
> -DHAVE_CONFIG_H -I../../src/gdb/../include/opcode
> -I../../src/gdb/../readline/.. -I../bfd
> -I../../src/gdb/../bfd
> -I../../src/gdb/../include -I../libdecnumber
> -I../../src/gdb/../libdecnumber?
> -I../../src/gdb/gnulib -Ignulib
> -DMI_OUT=1 -DTUI=1? -Wall
> -Wdeclaration-after-statement
> -Wpointer-arith -Wformat-nonliteral -Wno-pointer-sign
> -Wno-unused
> -Wno-switch -Wno-char-subscripts -Werror -c -o i386-tdep.o
> -MT
> i386-tdep.o -MMD -MP -MF .deps/i386-tdep.Tpo
> ../../src/gdb/i386-tdep.c
> cc1: warnings being treated as errors
> ../../src/gdb/i386-tdep.c: In function
> 'i386_process_record':
> ../../src/gdb/i386-tdep.c:4985: warning: implicit
> declaration of
> function 'paddr_nz'
> ../../src/gdb/i386-tdep.c:4985: warning: format '%s'
> expects type
> 'char *', but argument 2 has type 'int'
> make[2]: *** [i386-tdep.o] Error 1
> make[2]: Leaving directory `/media/disk/gdb/bgdb/gdb'
> make[1]: *** [all-gdb] Error 2
> make[1]: Leaving directory `/media/disk/gdb/bgdb'
> make: *** [all] Error 2
>
> paddr_nz was removed.? Please update your patch follow
> cvs-head.
>
> 2. +#define I386_SAVE_FPU_REGS???
> ??? 0xFFFD
> +#define I386_SAVE_FPU_ENV???
> ??? 0xFFFE
> +#define I386_SAVE_FPU_ENV_REG_STACK???
> 0xFFFF
>
> They just used in prec right?? Maybe you can move them
> close to record
> code in i386-tedp.c.
>
> 3. +static int i386_record_floats(struct i386_record_s *ir,
> uint32_t iregnum)
> +{
> +? int i;
> +
> +? /* Oza : push/pop of fpu stack is going to happen
> +? ???currently we store st0-st7
> registers, but we need not store all
> registers all the time.
> +? ???using fstatus, we use 11-13 bits
> which gives us stack top and
> hence we optimize our storage.
> +? ???alternatively we can use ftag
> register too */
> +? if (I386_SAVE_FPU_REGS == iregnum)
> +? ? {
> +? ? ? for
> (i=I386_ST0_REGNUM;i<=I386_ST0_REGNUM+7;i++)
> +? ? ? ? {
> +? ? ? ? ? if
> (record_arch_list_add_reg (ir->regcache,i))
> +? ? ? ? ? ? return -1;
> +? ? ? ? }
> +? ? }
> About the number of fp regs.? Please use the code:
> #define I387_ST0_REGNUM(tdep) ((tdep)->st0_regnum)
> #define I387_NUM_XMM_REGS(tdep) ((tdep)->num_xmm_regs)
> #define I387_MM0_REGNUM(tdep) ((tdep)->mm0_regnum)
>
> #define I387_FCTRL_REGNUM(tdep) (I387_ST0_REGNUM (tdep) +
> 8)
> #define I387_FSTAT_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) +
> 1)
> #define I387_FTAG_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) +
> 2)
> #define I387_FISEG_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) +
> 3)
> #define I387_FIOFF_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) +
> 4)
> #define I387_FOSEG_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) +
> 5)
> #define I387_FOOFF_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) +
> 6)
> #define I387_FOP_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) +
> 7)
> #define I387_XMM0_REGNUM(tdep) (I387_ST0_REGNUM (tdep) +
> 16)
> #define I387_MXCSR_REGNUM(tdep) \
> ? (I387_XMM0_REGNUM (tdep) + I387_NUM_XMM_REGS
> (tdep))
>
> They are in i387-tdep.h.
>
> And maybe you can try function i387_supply_fsave and
> i387_collect_fsave.
>
>
> 4.? Your code's format is not very well.? Please
> make it like the code in cvs.
>
>
>
> Thanks,
> Hui
>
>
>
>
> On Sat, Jul 4, 2009 at 13:19, paawan oza<paawan1982@yahoo.com>
> wrote:
> >
> > Hi,
> >
> > Actually, the initial patch which I submitted were
> using them.
> > but as I have incorporated Hui's comments I have
> removed those constants completely.
> > in the sense I have no longer extended the
> enumration.
> >
> > but of course, those registers are recorded as and
> when required.
> > e.g. (ffree insn changes FTAG register, so we record
> it)
> >
> > Regards,
> > Oza.
> >
> > --- On Sat, 7/4/09, Michael Snyder <msnyder@vmware.com>
> wrote:
> >
> >> From: Michael Snyder <msnyder@vmware.com>
> >> Subject: Re: i386.record.floating.point.patch :
> with more testing and assurity
> >> To: "paawan oza" <paawan1982@yahoo.com>
> >> Cc: "Mark Kettenis" <mark.kettenis@xs4all.nl>,
> "pedro@codesourcery.com"
> <pedro@codesourcery.com>,
> "teawater@gmail.com"
> <teawater@gmail.com>,
> "gdb-patches@sourceware.org"
> <gdb-patches@sourceware.org>
> >> Date: Saturday, July 4, 2009, 3:19 AM
> >> paawan oza wrote:
> >> > Hi,
> >> >
> >> > In My understanding the point was like
> below.
> >> > in the patch there were following register
> extended in
> >> enumeration in i386-tdep.h
> >> >
> >> > I386_FSTAT,
> >> > I386_FTAG,? ? ???I386_FISEG,
> >> > I386_FIOFF,
> >> > I386_FOSEG,
> >> > I386_FOOFF,
> >> > I386_FOP
> >> >
> >> >
> >> > According to Hui in some of his previous
> mails...his
> >> idea was
> >> >> FCTRL, FOP and so on are the fp reg of
> >> amd64.? For now, prec is still
> >> >> not support amd64 And amd64's support are
> in
> >> amd64-tedp.... files.? >Change i386_regnum is
> not a
> >> good idea. I suggest you divide fp patch to 2
> >parts. One
> >> is for i386, the other for amd64. For now, just
> send i386
> >> patch >for review.? And send amd64 patch when
> prec
> >> support amd64"
> >> >
> >> >
> >> > while, my idea/understanding is:
> >> > FCTRL, FOP registers are not only a part of
> amd64, but
> >> also part of i386 (x87 FPU unit) also.
> >> > so according to me these registers are part
> of i386
> >> also and it needed to be also in i386-tdep.h.
> >> >
> >> > Regards,
> >> > Oza.
> >>
> >> I'm not sure why you want to add those constants
> to
> >> i386-tdep.h,
> >> when the rest of your patch does not seem to use
> them.
> >>
> >>
> >
> >
> >
> >
>