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Re: [Patch 1/2] Fix aftermath of 'infrun.c support for MIPS hardware watchpoints.'


Pedro Alves wrote:

In the mean time, your patch is OK. I'd just move the
registers_changed call to *after* target_resume, because the target_resume implementation could trigger a register cache
refetch, thus reintroducing the problem (e.g., it doesn't happen
on mips *today*, but see e.g., i386-linux-nat.c:i386_linux_resume). I'd
put it right after the prepare_to_wait call.


2009-04-20 David Daney <ddaney@caviumnetworks.com>

* infrun.c (handle_inferior_event): Move registers_changed call down.


This is the version I committed.


Thanks for taking the time to review these.

2009-04-20 David Daney <ddaney@caviumnetworks.com>

* infrun.c (handle_inferior_event): Move registers_changed call down.
Index: infrun.c
===================================================================
RCS file: /cvs/src/src/gdb/infrun.c,v
retrieving revision 1.368
diff -u -p -r1.368 infrun.c
--- infrun.c	14 Apr 2009 00:59:47 -0000	1.368
+++ infrun.c	20 Apr 2009 21:06:10 -0000
@@ -2842,10 +2842,10 @@ targets should add new threads to the th
 
       if (!HAVE_STEPPABLE_WATCHPOINT)
 	remove_breakpoints ();
-      registers_changed ();
 	/* Single step */
       hw_step = maybe_software_singlestep (current_gdbarch, read_pc ());
       target_resume (ecs->ptid, hw_step, TARGET_SIGNAL_0);
+      registers_changed ();
       waiton_ptid = ecs->ptid;
       if (HAVE_STEPPABLE_WATCHPOINT)
 	infwait_state = infwait_step_watch_state;

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