Re: PATCH: Extend gdb remote protocol for AVX

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Mon, Oct 6, 2008 at 2:35 PM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>> Date: Sun, 5 Oct 2008 07:37:13 -0700
>> From: "H.J. Lu" <hjl.tools@gmail.com>
>>
>> On Sat, Oct 4, 2008 at 3:13 PM, Daniel Jacobowitz <dan@codesourcery.com> wrote:
>> >> I have no objection to the changes you proposed for the remote
>> >> protocol.  But your diff also touches the core register stuff, and
>> >> that needs a bit more thought to make sure we don't surprise our
>> >> users.  At that point, it may be easier to use the same model for the
>> >> remote protocol, where you transfer the top 128 bits of the %ymm
>> >> registers in addition to the %xmm registers.  Adter all this is how
>> >> the hardware does it too (xsave is just an extension of fxsave).
>> >
>> > One way would be to transfer the xmm registers and then the remaining
>> > bits as unnamed registers; another, probably easier way would be to
>> > use an architecture specification or an actual register description to
>> > transfer just the ymm registers and let GDB know about that fact, so
>> > it can synthesize the xmm registers.
>> >
>> > (I don't remember the original patch, that may be what you're talking
>> > about already.)
>> >
>>
>> My proposal transfers the whole 256bit registers.  We can display
>> xmm registers as the lower 128bit ymm registers if we can
>> display al/ax/eax.
>
> That certainly is a possibility, but if it is the right choice depends
> on quite a bit more things that just ease of implementation of the
> remote protocol.  An important thing to check is what register numbers
> compilers (and GCC in particular) use for these registers.  Are there
> compilers that already implement support for these new AVX
> instructions?

Gcc 4.4 supports AVX. Gcc uses the same register number internally
for xmm0 and ymm0. It has no problems with register allocator.

>
> We really should make sure the DWARF register number mapping in the
> AMD64 psABI gets updated for these new registers.  Given the way the
> current mapping us defined for %stN and %mmN, it probably makes sense
> to give %ymmN their own numbers.
>

The AVX x86-64 psABI extension is at

http://gcc.gnu.org/ml/gcc/2008-06/msg00408.html

The ia32 psABI extension is similar to SSE. The only difference is
__m256 requires 32byte alignment, instead of 16btye.

I removed AVX register map:

http://sourceware.org/ml/binutils/2008-08/msg00010.html

since xmm/ymm registers are all caller-saved and there are
no xmm/ymm registers in unwind info. For debug info, we
can tell ymm from xmm with data size.

-- 
H.J.