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[frv sim] shift flags masking
- From: DJ Delorie <dj at redhat dot com>
- To: gdb-patches at sourceware dot org
- Date: Thu, 20 Dec 2007 19:49:31 -0500
- Subject: [frv sim] shift flags masking
The shift opcodes that affect the ICC flags only affect some of them.
This patch adds a mask parameter that says which flags are allowed to
be set for each opcode. Ok?
* frv.cpu (setmask): New.
(int-shift-cc-semantics): Take a mask parameter for setting ICC.
(int-shift-cc-r-r): Likewise.
(conditional-int-shift-cc): Likewise.
(int-shift-cc-r-simm): Likewise.
(sllcc, srlcc, sracc): Pass the ICC mask.
(sllicc, srlicc, sraicc): Likewise.
(csllcc, csrlcc, csracc): Likewise.
Index: frv.cpu
===================================================================
RCS file: /cvs/src/src/cpu/frv.cpu,v
retrieving revision 1.24
diff -p -U3 -r1.24 frv.cpu
--- frv.cpu 5 Jul 2007 09:49:03 -0000 1.24
+++ frv.cpu 21 Dec 2007 00:45:27 -0000
@@ -3379,6 +3379,11 @@
; Integer condition code manipulation
;
+(define-pmacro (setmask icc mask cc)
+ (set icc (or (and icc (inv mask))
+ (and cc mask)))
+ )
+
(define-pmacro (set-z-and-n icc x)
(if (eq x 0)
(set icc (or (and icc #x7) #x4))
@@ -3818,7 +3823,7 @@
(int-logic-cc-r-r or OP_01 OPE2_03 "or reg/reg, set icc")
(int-logic-cc-r-r xor OP_01 OPE2_05 "xor reg/reg, set icc")
-(define-pmacro (int-shift-cc-semantics op l-r icc)
+(define-pmacro (int-shift-cc-semantics op l-r icc mask)
(sequence ((WI shift) (SI tmp) (QI cc))
(set shift (and GRj #x1f))
(set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)
@@ -3826,25 +3831,25 @@
(set tmp (op GRi shift))
(set GRk tmp)
(set-z-and-n cc tmp)
- (set icc cc))
+ (setmask icc mask cc))
)
-(define-pmacro (int-shift-cc-r-r name l-r op ope comment)
+(define-pmacro (int-shift-cc-r-r name l-r op ope comment mask)
(dni (.sym name cc)
(comment)
((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
(FR400-MAJOR I-1) (FR450-MAJOR I-1))
(.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1")
(+ pack GRk op GRi ICCi_1 ope GRj)
- (int-shift-cc-semantics name l-r ICCi_1)
+ (int-shift-cc-semantics name l-r ICCi_1 mask)
((fr400 (unit u-integer)) (fr450 (unit u-integer))
(fr500 (unit u-integer)) (fr550 (unit u-integer)))
)
)
-(int-shift-cc-r-r sll left OP_01 OPE2_09 "shift left logical reg/reg,set icc")
-(int-shift-cc-r-r srl right OP_01 OPE2_0B "shift right logical reg/reg,set icc")
-(int-shift-cc-r-r sra right OP_01 OPE2_0D "shift right arith reg/reg,set icc")
+(int-shift-cc-r-r sll left OP_01 OPE2_09 "shift left logical reg/reg,set icc" #xE)
+(int-shift-cc-r-r srl right OP_01 OPE2_0B "shift right logical reg/reg,set icc" #xC)
+(int-shift-cc-r-r sra right OP_01 OPE2_0D "shift right arith reg/reg,set icc" #xD)
(define-pmacro (multiply-cc-semantics signop arg1 arg2 targ icc)
(sequence ((DI tmp) (QI cc))
@@ -3925,7 +3930,7 @@
(conditional-int-logic-cc corcc or OP_5B OPE4_1 "conditional or , set icc")
(conditional-int-logic-cc cxorcc xor OP_5B OPE4_2 "conditional xor, set icc")
-(define-pmacro (conditional-int-shift-cc name l-r op ope comment)
+(define-pmacro (conditional-int-shift-cc name l-r op ope comment mask)
(dni (.sym c name cc)
(comment)
((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
@@ -3934,15 +3939,15 @@
(+ pack GRk op GRi CCi cond ope GRj)
(if (eq CCi (or cond 2))
(int-shift-cc-semantics name l-r
- (reg h-iccr (and (index-of CCi) 3))))
+ (reg h-iccr (and (index-of CCi) 3)) mask))
((fr400 (unit u-integer)) (fr450 (unit u-integer))
(fr500 (unit u-integer)) (fr550 (unit u-integer)))
)
)
-(conditional-int-shift-cc sll left OP_5D OPE4_0 "shift left logical, set icc")
-(conditional-int-shift-cc srl right OP_5D OPE4_1 "shift right logical, set icc")
-(conditional-int-shift-cc sra right OP_5D OPE4_2 "shift right arith , set icc")
+(conditional-int-shift-cc sll left OP_5D OPE4_0 "shift left logical, set icc" #xD)
+(conditional-int-shift-cc srl right OP_5D OPE4_1 "shift right logical, set icc" #xD)
+(conditional-int-shift-cc sra right OP_5D OPE4_2 "shift right arith , set icc" #xD)
; Add and subtract with carry
;
@@ -4194,7 +4199,7 @@
(multiply-cc-r-simm smulicc ext OP_19 "signed multiply reg/immed")
(multiply-cc-r-simm umulicc zext OP_1B "unsigned multiply reg/immed")
-(define-pmacro (int-shift-cc-r-simm name l-r op comment)
+(define-pmacro (int-shift-cc-r-simm name l-r op comment mask)
(dni (.sym name icc)
(comment)
((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1)
@@ -4208,15 +4213,15 @@
(set tmp (name GRi shift))
(set GRk tmp)
(set-z-and-n cc tmp)
- (set ICCi_1 cc))
+ (setmask ICCi_1 mask cc))
((fr400 (unit u-integer)) (fr450 (unit u-integer))
(fr500 (unit u-integer)) (fr550 (unit u-integer)))
)
)
-(int-shift-cc-r-simm sll left OP_29 "shift left logical reg/immed, set icc")
-(int-shift-cc-r-simm srl right OP_2B "shift right logical reg/immed, set icc")
-(int-shift-cc-r-simm sra right OP_2D "shift right arith reg/immed, set icc")
+(int-shift-cc-r-simm sll left OP_29 "shift left logical reg/immed, set icc" #xE)
+(int-shift-cc-r-simm srl right OP_2B "shift right logical reg/immed, set icc" #xC)
+(int-shift-cc-r-simm sra right OP_2D "shift right arith reg/immed, set icc" #xD)
(define-pmacro (int-arith-x-r-simm name operation op comment)
(dni name