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[frv sim] MCPLI fix


Similar problem as MCPLHI but just the shift counts.

	* frv.cpu (mcpli): Correct shift counts.

Index: frv.cpu
===================================================================
RCS file: /cvs/src/src/cpu/frv.cpu,v
retrieving revision 1.24
diff -p -U3 -r1.24 frv.cpu
--- frv.cpu	5 Jul 2007 09:49:03 -0000	1.24
+++ frv.cpu	20 Dec 2007 02:42:08 -0000
@@ -8092,8 +8099,8 @@
 	       (if (ne shift 0)
 		   (sequence ((SI tmp1))
 			     (set tmp1 (srl (sll (nextreg h-fr_int FRinti 1)
-						 (sub 31 shift))
-					    (sub 31 shift)))
+						 (sub 32 shift))
+					    (sub 32 shift)))
 			     (set tmp (or tmp tmp1))))
 	       (set FRintk tmp))
      ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual))


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