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Re: [patch/RFA] multiarch INSTRUCTION_NULLIFIED


Mark Kettenis wrote:
That's why we had the STEP_SKIPS_DELAY macro that makes sure the
single-step is done without any breakpoints inserted.  This was
replaced by single_step_through_delay which presumably will also be
used on a new CRISv32 port.

Yes, CRISv32 basically has the MIPS situation in reverse: if you single-step into a delay slot (belonging to a branch instruction) and single-step again, the branch instruction will be re-executed. As a consequence, if there is a breakpoint at the branch instruction itself, we need to step again before re-inserting it (otherwise we'd just hit it again). (I like to think of single_step_through_delay as "did we just step into a situation where we need to step again".)


--
Orjan Friberg
Axis Communications


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