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Re: [patch] sim/sh: fix movua for little endian


> Can we fix that then?  SIM fixes should always go hand-in-hand with a 
> testcase.
> 
> If fixing the be/le problems flushes out other failures, just note them, 
> I'm sure someone will fix them soon enough.

I added a generic mechanism to allow the cpus to feed global options
into the test harness.

fcnvds.s fails, but I don't think it's the test suite that's broken.
I suspect there's a disagreement between gas and sim on how to lay out
doubles in memory.

I went with gcc-compatible options, for no reason other than that's
what my site.exp already used for the gcc/sh testsuite, and I didn't
want to have to have two site.exp's.


2004-09-08  DJ Delorie  <dj@redhat.com>

	* lib/sim-defs.exp (run_sim_test): Add global_as_options,
	global_ld_options, and global_sim_options to all test cases,
	if defined.
	* sim/sh/allinsn.exp: Set global_as_options and
	global_ld_options appropriately for little endian builds.
	* sim/sh/movua.s: Support little endian.

Index: lib/sim-defs.exp
===================================================================
RCS file: /cvs/src/src/sim/testsuite/lib/sim-defs.exp,v
retrieving revision 1.6
diff -p -U3 -r1.6 sim-defs.exp
--- lib/sim-defs.exp	12 May 2004 03:34:26 -0000	1.6
+++ lib/sim-defs.exp	8 Sep 2004 22:34:00 -0000
@@ -165,6 +165,9 @@ proc run_sim_test { name requested_machs
     global SIMFLAGS
     global opts
     global cpu_option
+    global global_as_options
+    global global_ld_options
+    global global_sim_options
 
     if [string match "*/*" $name] {
 	set file $name
@@ -187,6 +190,16 @@ proc run_sim_test { name requested_machs
     set opts(timeout) ""
     set opts(xerror) "no"
 
+    if ![info exists global_as_options] {
+        set global_as_options ""
+    }
+    if ![info exists global_ld_options] {
+        set global_ld_options ""
+    }
+    if ![info exists global_sim_options] {
+        set global_sim_options ""
+    }
+
     # Clear any machine specific options specified in a previous test case
     foreach m $requested_machs {
 	if [info exists opts(as,$m)] {
@@ -250,7 +263,7 @@ proc run_sim_test { name requested_machs
 	if [info exists cpu_option] {
 	    set as_options "$as_options $cpu_option=$mach"
 	}
-	set comp_output [target_assemble $sourcefile ${name}.o "$as_options"]
+	set comp_output [target_assemble $sourcefile ${name}.o "$as_options $global_as_options"]
 
 	if ![string match "" $comp_output] {
 	    verbose -log "$comp_output" 3
@@ -262,7 +275,7 @@ proc run_sim_test { name requested_machs
 	    set opts(ld,$mach) $opts(ld)
 	}
 
-	set comp_output [target_link ${name}.o ${name}.x "$opts(ld,$mach)"]
+	set comp_output [target_link ${name}.o ${name}.x "$opts(ld,$mach) $global_ld_options"]
 
 	if ![string match "" $comp_output] {
 	    verbose -log "$comp_output" 3
@@ -281,7 +294,7 @@ proc run_sim_test { name requested_machs
 	    set options "$options timeout=$opts(timeout)"
 	}
 
-	set result [sim_run ${name}.x "$opts(sim,$mach)" "" "" "$options"]
+	set result [sim_run ${name}.x "$opts(sim,$mach) $global_sim_options" "" "" "$options"]
 	set status [lindex $result 0]
 	set output [lindex $result 1]
 
Index: sim/sh/allinsn.exp
===================================================================
RCS file: /cvs/src/src/sim/testsuite/sim/sh/allinsn.exp,v
retrieving revision 1.5
diff -p -U3 -r1.5 allinsn.exp
--- sim/sh/allinsn.exp	12 Feb 2004 22:29:48 -0000	1.5
+++ sim/sh/allinsn.exp	8 Sep 2004 22:34:01 -0000
@@ -2,6 +2,13 @@
 
 set all "sh shdsp"
 
+foreach opt $board_variant_list {
+    switch "x$opt" {
+	x-ml { set global_as_options "-little --defsym LITTLE=1"
+	       set global_ld_options "-EL" }
+    }
+}
+
 if [istarget sh-*elf] {
     run_sim_test add.s    $all
     run_sim_test and.s    $all
Index: sim/sh/movua.s
===================================================================
RCS file: /cvs/src/src/sim/testsuite/sim/sh/movua.s,v
retrieving revision 1.1
diff -p -U3 -r1.1 movua.s
--- sim/sh/movua.s	9 Jan 2004 19:47:36 -0000	1.1
+++ sim/sh/movua.s	8 Sep 2004 22:34:01 -0000
@@ -10,55 +10,107 @@ movua_1:
 	set_grs_a5a5
 	mov.l	srcp, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x03020100
+.else
 	assertreg0	0x00010203
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x04030201
+.else
 	assertreg0	0x01020304
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x05040302
+.else
 	assertreg0	0x02030405
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x06050403
+.else
 	assertreg0	0x03040506
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x07060504
+.else
 	assertreg0	0x04050607
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x08070605
+.else
 	assertreg0	0x05060708
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x09080706
+.else
 	assertreg0	0x06070809
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x0a090807
+.else
 	assertreg0	0x0708090a
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x0b0a0908
+.else
 	assertreg0	0x08090a0b
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x0c0b0a09
+.else
 	assertreg0	0x090a0b0c
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x0d0c0b0a
+.else
 	assertreg0	0x0a0b0c0d
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x0e0d0c0b
+.else
 	assertreg0	0x0b0c0d0e
+.endif
 
 	add	#1, r1
 	movua.l	@r1, r0
+.ifdef LITTLE
+	assertreg0	0x0f0e0d0c
+.else
 	assertreg0	0x0c0d0e0f
+.endif
 
 	assertreg	src+12, r1
 	test_gr_a5a5	r2
@@ -87,25 +139,41 @@ movua_4:
 	set_grs_a5a5
 	mov.l	srcp2, r1
 	movua.l	@r1+, r0
+.ifdef LITTLE
+	assertreg0	0x03020100
+.else
 	assertreg0	0x00010203
+.endif
 	assertreg	src+4, r1
 
 	mov.l	srcp2, r1
 	add	#1, r1
 	movua.l	@r1+, r0
+.ifdef LITTLE
+	assertreg0	0x04030201
+.else
 	assertreg0	0x01020304
+.endif
 	assertreg	src+5, r1
 
 	mov.l	srcp2, r1
 	add	#2, r1
 	movua.l	@r1+, r0
+.ifdef LITTLE
+	assertreg0	0x05040302
+.else
 	assertreg0	0x02030405
+.endif
 	assertreg	src+6, r1
 
 	mov.l	srcp2, r1
 	add	#3, r1
 	movua.l	@r1+, r0
+.ifdef LITTLE
+	assertreg0	0x06050403
+.else
 	assertreg0	0x03040506
+.endif
 	assertreg	src+7, r1
 
 	test_gr_a5a5	r2


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