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[applied patch] mips sim testsuite


It's a bit late for a generic MIPS sim testsuite.  OK, fine, like 8
years late.  And this is a very small way to start.

The ldscript clearing is ugly, but see comments.  The testing for
sim-ness is also ugly, but if not done the tests are run (and fail) on
mips*-elf real-hardware targets...  the common test code is also a bit
grotty.  I don't yet have a real understanding of the proper way to
use "models" without severe pain (having to touch nearly every test
script when adding a new model).

The good-enough is the enemy of the best.  8-)

Tested with mips-elf/mips64-elf on mips-sim/mips64-sim.  Also tested
on a few other targets/boards to verify that the tests wouldn't be run
when *that* was appropriate.


chris
--
[ sim/ChangeLog ]
2004-01-26  Chris Demetriou  <cgd@broadcom.com>

	* configure.in (mips*-*-*): Configure in testsuite.
	* configure: Regenerate.

[ sim/testsuite/ChangeLog ]
2004-01-26  Chris Demetriou  <cgd@broadcom.com>

	* sim/mips: New directory.  Tests for the MIPS simulator.

[ sim/testsuite/sim/mips/ChangeLog ]
2004-01-26  Chris Demetriou  <cgd@broadcom.com>

	* basic.exp: New file.
	* testutils.inc: New file.
	* sanity.s: New file.

Index: configure.in
===================================================================
RCS file: /cvs/src/src/sim/configure.in,v
retrieving revision 1.14
diff -u -p -r1.14 configure.in
--- configure.in	8 Oct 2003 18:24:37 -0000	1.14
+++ configure.in	26 Jan 2004 08:01:13 -0000
@@ -81,7 +81,7 @@ case "${target}" in
 	# The MIPS simulator can only be compiled by gcc.
 	sim_target=mips
 	only_if_gcc=yes
-	extra_subdirs="${extra_subdirs} igen"
+	extra_subdirs="${extra_subdirs} igen testsuite"
 	;;
   mn10300*-*-*)
 	# The mn10300 simulator can only be compiled by gcc.
Index: testsuite/sim/mips/basic.exp
===================================================================
RCS file: testsuite/sim/mips/basic.exp
diff -N testsuite/sim/mips/basic.exp
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/sim/mips/basic.exp	26 Jan 2004 08:01:13 -0000
@@ -0,0 +1,26 @@
+# MIPS simulator instruction tests
+
+# As gross as it is, we unset the linker script specifid by the target
+# board.  The MIPS libgloss linker scripts include libgcc (and possibly
+# other libraries), which the linker (used to link these tests rather
+# than the compiler) can't necessarily find.
+unset_currtarget_info ldscript
+
+# Only test mips*-elf (e.g., no mips-linux), and only test if the target
+# board really is a simulator (sim tests don't work on real HW).
+if {[istarget mips*-elf] && [board_info target exists is_simulator]} {
+
+    if {[istarget mipsisa64*-elf]} {
+	set models "mips1 mips2 mips3 mips4 mips32 mips64"
+    } elseif {[istarget mipsisa32*-elf]} {
+	set models "mips1 mips2 mips32"
+    } elseif {[istarget mips64*-elf]} {
+	set models "mips1 mips2 mips3"
+    } else {
+	# fall back to just testing mips1 code.
+	set models "mips1"
+    }
+    set cpu_option -march
+
+    run_sim_test sanity.s $models
+}
Index: testsuite/sim/mips/sanity.s
===================================================================
RCS file: testsuite/sim/mips/sanity.s
diff -N testsuite/sim/mips/sanity.s
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/sim/mips/sanity.s	26 Jan 2004 08:01:13 -0000
@@ -0,0 +1,20 @@
+# mips test sanity, expected to pass.
+# mach:	 all
+# as:		-mabi=eabi
+# ld:		-N -Ttext=0x80010000
+# output:	*\\npass\\n
+
+	.include "testutils.inc"
+
+	setup
+
+	.set noreorder
+
+	.ent DIAG
+DIAG:
+
+	writemsg "Sanity is good!"
+
+	pass
+
+	.end DIAG
Index: testsuite/sim/mips/testutils.inc
===================================================================
RCS file: testsuite/sim/mips/testutils.inc
diff -N testsuite/sim/mips/testutils.inc
--- /dev/null	1 Jan 1970 00:00:00 -0000
+++ testsuite/sim/mips/testutils.inc	26 Jan 2004 08:01:13 -0000
@@ -0,0 +1,149 @@
+# MIPS simulator testsuite utility functions.
+# Copyright (C) 2004 Free Software Foundation, Inc.
+# Contributed by Chris Demetriou of Broadcom Corporation.
+#
+# This file is part of the GNU simulators.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+
+# $1, $4, $5, %6, are used as temps by the macros defined here.
+
+	.macro writemsg msg
+	.data
+901:	.ascii	"\msg\n"
+902:
+	.previous
+	la	$5, 901b
+	li	$6, 902b - 901b
+	.set push
+	.set noreorder
+	jal	_dowrite
+	li	$4, 0
+	.set pop
+	.endm
+
+
+	# The MIPS simulator uses "break 0x3ff" as the code to exit,
+	# with the return value in $4 (a0).
+	.macro exit rc
+	li	$4, \rc
+	break	0x3ff
+	.endm
+
+
+	.macro setup
+
+	.global _start
+	.ent _start
+_start:
+	.set push
+	.set noreorder
+	j	DIAG
+	nop
+	.set pop
+	.end _start
+
+	.global _fail
+	.ent _fail
+_fail:
+	writemsg "fail"
+	exit 1
+	.end _fail
+
+	.global _pass
+	.ent _pass
+_pass:
+	writemsg "pass"
+	exit 0
+	.end _pass
+
+	# The MIPS simulator can use multiple different monitor types,
+	# so we hard-code the simulator "write" reserved instruction opcode,
+	# rather than jumping to a vector that invokes it.  The operation
+	# expects RA to point to the location at which to continue
+	# after writing.
+	.global _dowrite
+	.ent _dowrite
+_dowrite:
+	# Write opcode (reserved instruction).  See sim_monitor and its
+	# callers in sim/mips/interp.c.
+	.word	0x00000005 | ((8 << 1) << 6)
+	.end _dowrite
+
+	.endm	# setup
+
+
+	.macro pass
+	.set push
+	.set noreorder
+	j	_pass
+	nop	
+	.set pop
+	.endm
+
+
+	.macro fail
+	.set push
+	.set noreorder
+	j	_fail
+	nop	
+	.set pop
+	.endm
+
+
+	.macro load32 reg, val
+	li	\reg, \val
+	.endm
+
+
+	.macro load64 reg, val
+	dli	\reg, \val
+	.endm
+
+
+	.macro loadaddr reg, addr
+	la	\reg, \addr
+	.endm
+
+
+	.macro checkreg reg, expreg
+	.set push
+	.set noat
+	.set noreorder
+	beq	\expreg, \reg, 901f
+	nop
+	fail
+901:
+	.set pop
+	.endm
+
+
+	.macro check32 reg, val
+	.set push
+	.set noat
+	load32	$1, \val
+	checkreg \reg, $1
+	.set pop
+	.endm
+
+
+	.macro check64 reg, val
+	.set push
+	.set noat
+	load64	$1, \val
+	checkreg \reg, $1
+	.set pop
+	.endm


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