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Re: [patch] add trace capabilities to arm sim
- To: Richard dot Earnshaw at arm dot com
- Subject: Re: [patch] add trace capabilities to arm sim
- From: DJ Delorie <dj at redhat dot com>
- Date: Mon, 26 Feb 2001 13:56:53 -0500
- CC: gdb-patches at sources dot redhat dot com
- References: <200102261840.SAA17450@cam-mail2.cambridge.arm.com>
> > + sim_trace_one_arm_insn (pc, instr);
>
> This will bump up the cost of simulating each instruction by the overhead
> of this call plus any code within that always gets executed.
OK, I hadn't looked at the state->Exception check as a generic "check things"
but that makes sense.
> > + if (insn == 0)
> > + {
> > + state->Emulate = STOP;
>
> why should executing the (legal) instruction
>
> andeq r0, r0, r0
>
> cause the simulation to halt (OK, it's not very useful, but it is a valid
> NOP)?
I took that from a commented out debug check in the emulator. The
idea was to trap when the thread of execution left the code space and
either hit zeros in the data space, or left RAM completely. I'll take
it out now that I know it's a valid opcode.
> > + if (!do_tracing)
> > + return;
>
> Shouldn't this be the first thing you check?
Either way worked for me, but I can make it first.