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shebs@cygnus.com said: > A side-note, before ARM Architecture v4 many "undefined" > instruction formats aren't guaranteed to take the undefined > instruction trap. Also note that, in this respect, the ARM7TDMI > is NOT fully ARM v4 compliant. > I don't quite understand - I hope ARM7TDMI is guaranteed to take the > trap, since Angel monitors are depending on that. I should have been more precise with my wording. The words in the ARM ARM say that ARMv4 defines several new undefined instructions (ie instructions that will take the undefined instruction trap). In fact, although the 7TDMI is nominally v4t (and hence includes all of v4) it does not in fact add the new undefined instructions, though it implements the rest of the v4 architecture. The new undefined instructions in v4 are all instructions which had no defined behaviour in earlier chips (but for which there was no guarantee that they would raise an exception); I believe most of the instructions were NOPs but I could be wrong. In practice, I think it is only safe to rely on instructions matching 3 2 2 2 2 2 1 8 7 6 5 4 5 4 3 0 C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x taking the undefined trap, and even then only when the condition predicate is true. > I don't know if anyone cares about RISC iX support any more (though > gcc still supports it). > You'd be most likely to know if anyone would, methinks! Since we've > adopted a policy of marking and ultimately deleting obsolete code in > GDB, and RISC iX is one of the candidates, any information you could > provide would be helpful. Do you know if anybody is using a RISC iX > system nowadays, and if they would have any interest in a port of > current GDB? Not necessarily, it was an Acorn Product not an ARM one. I do have one at home, but it's slow by today's standards and makes a lot of noise, so it isn't switched on very often (I really only keep it in case a problem gets reported).