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[binutils-gdb] [Cell/B.E.] Make parse_spufs_run more robust
- From: Ulrich Weigand <uweigand at sourceware dot org>
- To: gdb-cvs at sourceware dot org
- Date: 27 Aug 2015 17:36:36 -0000
- Subject: [binutils-gdb] [Cell/B.E.] Make parse_spufs_run more robust
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=791bb1f4a6310cd7f894e370607dfc05c9cb0727
commit 791bb1f4a6310cd7f894e370607dfc05c9cb0727
Author: Ulrich Weigand <ulrich.weigand@de.ibm.com>
Date: Thu Aug 27 19:27:40 2015 +0200
[Cell/B.E.] Make parse_spufs_run more robust
With recent changes to inferior handling, parse_spufs_run needs to be
more careful in assumptions it makes. In particular, this patch:
- Bails out early if the current inferior has not yet been registered
(e.g. during fork procession) to avoid assertion failures in register
cache code.
- Sets inferior_ptid to the current ptid while calling target_read_memory
to make sure the correct process is accessed if parse_spufs_run is
called early when inferior_ptid has not yet been switched by the caller.
ChangeLog:
* spu-multiarch.c (parse_spufs_run): Bail out if inferior is not
registered yet. Set inferior_ptid while calling target_read_memory.
Diff:
---
gdb/ChangeLog | 5 +++++
gdb/spu-multiarch.c | 12 +++++++++++-
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 61e9851..46fb2d1 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,10 @@
2015-08-08 Ulrich Weigand <uweigand@de.ibm.com>
+ * spu-multiarch.c (parse_spufs_run): Bail out if inferior is not
+ registered yet. Set inferior_ptid while calling target_read_memory.
+
+2015-08-08 Ulrich Weigand <uweigand@de.ibm.com>
+
* nat/linux-ptrace.h (GDB_ARCH_TRAP_BRKPT): Replace by ...
(GDB_ARCH_IS_TRAP_BRKPT): ... this. Add __powerpc__ case.
* linux-nat.c (check_stopped_by_breakpoint): Use
diff --git a/gdb/spu-multiarch.c b/gdb/spu-multiarch.c
index 459cb2f..b07c4ff 100644
--- a/gdb/spu-multiarch.c
+++ b/gdb/spu-multiarch.c
@@ -56,6 +56,7 @@ static int
parse_spufs_run (ptid_t ptid, int *fd, CORE_ADDR *addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
+ struct cleanup *old_chain;
struct gdbarch_tdep *tdep;
struct regcache *regcache;
gdb_byte buf[4];
@@ -65,12 +66,21 @@ parse_spufs_run (ptid_t ptid, int *fd, CORE_ADDR *addr)
if (gdbarch_bfd_arch_info (target_gdbarch ())->arch != bfd_arch_powerpc)
return 0;
+ /* If we're called too early (e.g. after fork), we cannot
+ access the inferior yet. */
+ if (find_inferior_ptid (ptid) == NULL)
+ return 0;
+
/* Get PPU-side registers. */
regcache = get_thread_arch_regcache (ptid, target_gdbarch ());
tdep = gdbarch_tdep (target_gdbarch ());
/* Fetch instruction preceding current NIP. */
- if (target_read_memory (regcache_read_pc (regcache) - 4, buf, 4) != 0)
+ old_chain = save_inferior_ptid ();
+ inferior_ptid = ptid;
+ regval = target_read_memory (regcache_read_pc (regcache) - 4, buf, 4);
+ do_cleanups (old_chain);
+ if (regval != 0)
return 0;
/* It should be a "sc" instruction. */
if (extract_unsigned_integer (buf, 4, byte_order) != INSTR_SC)