This is the mail archive of the
gdb-cvs@sourceware.org
mailing list for the GDB project.
src/sim/bfin ChangeLog bfin-sim.c
- From: vapier at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: Wed, 19 Jun 2013 03:12:26 +0000
- Subject: src/sim/bfin ChangeLog bfin-sim.c
CVSROOT: /cvs/src
Module name: src
Changes by: vapier@sourceware.org 2013-06-19 03:12:26
Modified files:
sim/bfin : ChangeLog bfin-sim.c
Log message:
sim: bfin: stricter insn decoding
We wrote a test case that tries every single 32bit opcode on the hardware
and compared it to the sim. There were a bunch of places in the sim where
we weren't strict enough (requiring certain parts of the opcode be set) so
we were treating a lot of invalid opcodes as valid ones. This sprinkles
out a lot additional checks in the dsp32alu class.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.97&r2=1.98
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/bfin-sim.c.diff?cvsroot=src&r1=1.40&r2=1.41